idt49c465apqfb Integrated Device Technology, idt49c465apqfb Datasheet - Page 32

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idt49c465apqfb

Manufacturer Part Number
idt49c465apqfb
Description
32-bit Flow-thru Error Detection Correction Unit
Manufacturer
Integrated Device Technology
Datasheet
IDT49C465/A
32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
AC TIMING DIAGRAMS — 64-BIT CONFIGURATION
NOTE:
1. Assumes that System Data is valid at least 3ns (Com.)/4ns (Mil.) before SLE goes HIGH.
SD
MERR
MD
MD
MOE
SOE
SYO
MLE
ERR
BOTH
BE
0–31
CBI
CBI
465s
(U)
(L)
N
LOWER 465
UPPER 465
(OUTPUT)
(OUTPUT)
to
to
t SESZx
t BESZx
t MEMxZ
1
1
t MLSY
Valid Checkbits In
t MMLS
t CMLS
Valid DATA
Valid DATA
t MLS
t MSY
t CSY
(1)
2
t MMLH
2
t CMLH
t MLE
3
t MLME
IN
IN
t ME
t MME
(1)
Partial Syndrome Out
(1)
Partial Syndrome In
3
3
Corrected DATA
Figure 11. 64-Bit Detect Timing
t CE
t CME
4
4
11.7
OUT
5
5
Parameter
t MEMxZ
t MMLS
t MMLH
t CMLS
t CMLH
t MLS
t BESZx
t SESZx
t MSY
t CSY
t MLSY
Inter-chip delay (Design dependent)
t CME
t MLME
t CE
t MLE
t ME
t MME
Name
MILITARY AND COMMERCIAL TEMPERATURE RANGES
(1)
(1)
(1)
MOE = High to MD
Disabled
MD
MD
CBI Set-up to MLE = Low
CBI Hold to MLE = Low
MLE = High to SD
BE
SOE = Low to SD
MD Lower In to SYO
CBI to SYO
MLE = High to SYO
CBI to MERR
MLE = High to MERR
CBI to ERR
MLE = High to ERR
MD
MD
From
N
IN
IN
IN
IN
= High to SD
Set-up to MLE = Low
Hold to MLE = Low
to ERR
to MERR
Propagation Delay
OUT
OUT
OUT
OUT
OUT
Enabled
Enabled
(1)
To
2552 drw 23
Min./
Max.
max.
min.
min.
min.
min.
max.
max.
max.
max.
max.
max.
max.
max.
max.
max.
max.
max.
32

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