idt49c465apqfb Integrated Device Technology, idt49c465apqfb Datasheet

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idt49c465apqfb

Manufacturer Part Number
idt49c465apqfb
Description
32-bit Flow-thru Error Detection Correction Unit
Manufacturer
Integrated Device Technology
Datasheet
FEATURES
• 32-bit wide Flow-thruEDC unit, cascadable to 64 bits
• Single-chip 64-bit Generate Mode
• Separate system and memory buses
• On-chip pipeline latch with external control
• Supports bidirectional and common I/O memories
• Corrects all single-bit errors
• Detects all double-bit errors, some multiple-bit errors
• Error Detection Time — 12ns
• Error Correction Time — 14ns
• On chip diagnostic registers.
• Parity generation and checking on system data bus
• Low power CMOS — 100mA typical at 20MH
• 144-pin PGA and PQFP packages
• Military product compliant to MIL-STD 883, Class B
SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark and Flow-thruEDC is a trademarkof Integrated Device Technology Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PCBI
MD
1995 Integrated Device Technology, Inc.
SD
CBI
Integrated Device Technology, Inc.
MLE
SLE
PLE
0–31
0–31
0–7
0–7
Latch
SD
Latch
Checkbit
MD
Latch
32-BIT FLOW-THRU
ERROR DETECTION
AND CORRECTION UNIT
CONTROL
CONTROL
Z
Byte
Mux
Mux
Generator
Checkbit
Memory
11.7
DESCRIPTION
unit. The chip provides single-error correction and two and
three bit error detection of both hard and soft memory errors.
It can be expanded to 64-bit widths by cascading 2 units,
without the need for additional external logic. The Flow-
thruEDC has been optimized for speed and simplicity of
control.
configurations in an error correcting memory system. The
bidirectional configuration is most appropriate for systems
using bidirectional memory buses. A second system
configuration utilizes external octal buffers, and is well suited
for systems using memory with separate I/O buses.
and error diagnostics. It also provides parity protection for
data on the system side.
The IDT49C465/A is a 32-bit, two-data bus, Flow-thruEDC
The EDC unit has been designed to be used in either of two
The IDT49C465/A supports partial word writes, pipelining
Generator
Checkbit
System
CONTROL
CONTROL
Correct
Detect
Logic
Logic
Mux
IDT49C465A
IDT49C465
AUGUST 1995
2552 drw 01
DSC-9028/7
1
ERR
MERR
CBO
0–7

Related parts for idt49c465apqfb

idt49c465apqfb Summary of contents

Page 1

... SD 0–31 SD Latch SLE PLE The IDT logo is a registered trademark and Flow-thruEDC is a trademarkof Integrated Device Technology Inc. MILITARY AND COMMERCIAL TEMPERATURE RANGES 1995 Integrated Device Technology, Inc. 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT DESCRIPTION The IDT49C465 32-bit, two-data bus, Flow-thruEDC unit ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT PIN CONFIGURATION GND SLE ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT PIN CONFIGURATION V SD PCBI PCBI PCBI ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT DETAILED FUNCTIONAL BLOCK DIAGRAM MUX MILITARY AND COMMERCIAL TEMPERATURE RANGES MUX MUX 11.7 2552 drw 04 4 ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT SYSTEM CONFIGURATIONS The IDT49C465 EDC unit can be used in various configurations in an EDC system. The basic configurations are shown below. Figure 1 illustrates a bidirectional configuration, which is most appropriate ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT FUNCTIONAL DESCRIPTION The error detection/correction codes consist of a modified Hamming code identical to that used in the IDT49C460. 32-BIT MODE (CODE ID 1,0=00 CHECKBITS–IN 64-BIT MODE (CODE ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT PIN DESCRIPTIONS Symbol I/O I/O Buses and Controls SD I/O System Data Bus: Data from MD 0-7 SD rected in the other modes. The BE 8-15 SD output buffers during a read ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT PIN DESCRIPTIONS (Con’t.) Symbol I/O Inputs (Con’t.) MODE I MODE select: Selects one of four operating modes. 2-0 (x11) “Normal” Mode: Normal EDC operation (Flow-thru correction and generation). (x10) “Generate-Detect” Mode: In ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT DIAGNOSTIC DATA FORMAT (SYSTEM BUS) Latched Data Error Re- Error Type served Counter Byte ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT OPERATING MODE CHARTS SLICE IDENTIFICATION CODE ID 1 CODE ID 0 Slice Definition 0 0 32-bit Flow-Thru EDC 0 1 64-bit GENERATE Only EDC 1 0 64-bit EDC- Lower 32 bits (0-31) ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT PRIMARY DATA PATH vs. MEMORY CONFIGURATION SEPARATE I/O MEMORIES: 1. Checkbit Generation Write New Word to Memory CPU CBO IDT49C465 CBI 2. Data Correction Read Memory Word CPU CORRECTED ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT PARTIAL-WORD-WRITE OPERATIONS FOR COMMON I/O MEMORIES: SD BUS BYTE 3 BYTE 2 BYTE 1 BYTE ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT 32-BIT DATA WORD CONFIGURATION A single IDT49C465 EDC unit, connected as shown below, provides all the logic needed for single-bit error correction, and double-bit error detection 32-bit data field. The ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT 64-BIT DATA WORD CONFIGURATION Two IDT49C465 EDC units, connected as shown below, provide all the logic needed for single-bit error correction, and double-bit error detection 64-bit data field. The “Slice ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT DEFINITIONS OF TERMS: D – System Data and/or Memory Data Inputs 0 31 CBI – CBI = Checkbit Inputs 0 7 PCBI – PCBI = Partial Checkbit Inputs 0 7 ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT DETAILED DESCRIPTION — CHECKBIT AND SYNDROME GENERATION vs. CODE ID LOGIC EQUATIONS FOR THE CBO OUTPUTS CODE ID 1,0 Checkbit 00 10 Generation Final Chkbits Partial Checkbits CBO ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT DETAILED DESCRIPTION — 32-BIT CONFIGURATION 32-BIT MODIFIED HAMMING CODE — CHECKBIT ENCODING CHART Generated Checkbits Parity CB0 Even (XOR) CB1 Even (XOR) CB2 Odd (XNOR) CB3 Odd (XNOR) CB4 Even (XOR) CB5 ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT DETAILED DESCRIPTION — 64-BIT CONFIGURATION 64-BIT MODIFIED HAMMING CODE - CHECKBIT ENCODING CHART Generated Checkbits Parity CB0 Even (XOR) CB1 Even (XOR) CB2 Odd (XNOR) CB3 Odd (XNOR) CB4 Even (XOR) CB5 ...

Page 19

IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT DETAILED DESCRIPTION — 64-BIT CONFIGURATION (Con’t.) 64-BIT SYNDROME DECODE TO BIT-IN-ERROR HEX S7 S6 Syndrome S5 Bits S4 HEX ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT ABSOLUTE MAXIMUM RATINGS Symbol Rating Com’l. V Power Supply –0.5 to +7.0 –0.5 to +7.0 CC Voltage V Terminal Voltage –0.5 to TERM with Respect Ground T Operating 0 ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (Con’t.) The following conditions apply unless otherwise specified: Commercial + Symbol Parameter I Quiescent Power Supply Current CCQ ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT AC PARAMETERS - 49C465A PROPAGATION DELAY TIMES Parameter Description Number Parameter From To Name Input (edge) Output (edge) Max. GENERATE (WRITE) PARAMETERS ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT AC PARAMETERS - 49C465A PROPAGATION DELAY TIMES FROM LATCH ENABLES Parameter Description Parameter From Number Name Input (edge MLC 23 t MLE 24 t MLE = MLME 25 t MLP ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT SET-UP AND HOLD TIMES - 49C465A Parameter Description Parameter From Number Name Input (edge SDIN Set-up * SSLS 43 t SDIN Hold SSLH 44 t MDIN Set-up * MMLS 45 ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT AC PARAMETERS - 49C465 PROPAGATION DELAY TIMES Parameter Description Number Parameter From To Name Input (edge) Output (edge) Max. Max. Max. Max. Max. Max. Max. Max. Unit GENERATE (WRITE) PARAMETERS 01 t ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT AC PARAMETERS - 49C465 PROPAGATION DELAY TIMES FROM LATCH ENABLES Parameter Description Parameter From Number Name Input (edge MLC 23 t MLE 24 t MLE = HIGH MLME 25 t ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT SET-UP AND HOLD TIMES - 49C465 Parameter Description Parameter From Number Name Input 42 t SDIN Set-up SSLS 43 t SDIN Hold SSLH 44 t MDIN Set-up MMLS 45 t MDIN Hold ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT AC TIMING DIAGRAMS — 32-BIT CONFIGURATION BESxZ t BESxZ SOE t SESxZ t SESxZ (OUTPUT) DATA SD 0–31 t SSLS SLE P N PERR t SM (1) ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT AC TIMING DIAGRAMS — 32-BIT CONFIGURATION to 1 MOE t MEMxZ (OUTPUT) MD Valid DATA 0–31 t MMLS CBI Valid Checkbits In t CMLS MLE t MLSY SYO t MLEx ERR MERR ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT AC TIMING DIAGRAMS — 32-BIT CONFIGURATION to 1 MOE t MEMxZ (OUTPUT) Valid DATA MD 0–31 t MMLS CBI Valid Checkbits In t CMLS MLE t MLS PLE t PLS BE N ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT AC TIMING DIAGRAMS — 64-BIT CONFIGURATION BOTH to 1 465s BE N SOE t SESxZ t SESxZ DATA (OUTPUT & SSLS SLE P x PERR t SM MOE ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT AC TIMING DIAGRAMS — 64-BIT CONFIGURATION BOTH to 1 465s MOE t MEMxZ Valid DATA (OUTPUT) MD (L) t MMLS Valid Checkbits In CBI t CMLS MLE t MLS ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT AC TIMING DIAGRAMS — 64-BIT CONFIGURATION 64-BIT to 1 U/L Slice MOE t MEMxZ (OUTPUT) MD Valid DATA 0–31 t MMLS CBI Valid Checkbits In t CMLS MLE t MLS PCBI PLE ...

Page 34

IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT AC TIMING DIAGRAMS — 64-BIT CONFIGURATION 64-BIT to 1 U/L Slice MOE t MEMxZ (OUTPUT) MD Valid DATA 0–31 t MMLS CBI Valid Checkbits In t CMLS MLE t MLS PLE t ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT AC TIMING DIAGRAMS — 64-BIT CONFIGURATION SINGLE to 1 465 SOE (SOE = Tied high) SD Bus Valid DATA t SSLS SLE t SLC (MOE = Tied high) MOE Valid DATA MD ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT AC TIMING DIAGRAMS — DIAGNOSTIC TIMING to 1 465 Checkbits In CBI t CSCS Memory DataIN MD Bus t MSCS MLE t MLSCS SCLKEN t SESCS SYNCLK t CLEAR CLEAR SD Bus ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS OUT IN Pulse D.U.T. Generator R T SET-UP, HOLD AND RELEASE TIMES DATA INPUT t SU TIMING INPUT ASYNCHRONOUS ...

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IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT ORDERING INFORMATION IDT XX 49C465 Package Speed Device Type XX X Process/ Temperature Range 11.7 MILITARY AND COMMERCIAL TEMPERATURE RANGES BLANK Commercial ( + Military (– ...

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