idt49c465apqfb Integrated Device Technology, idt49c465apqfb Datasheet - Page 14

• Manufacturer Part Number: idt49c465apqfb
• Description: 32-bit Flow-thru Error Detection Correction Unit
• Manufacturer: Integrated Device Technology

IDT49C465/A
32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
64-BIT DATA WORD CONFIGURATION
provide all the logic needed for single-bit error correction, and
double-bit error detection, of a 64-bit data field. The “Slice
Identification” Table gives the CODE ID1,0 values needed for
distinguishing the upper 32 bits from the lower 32 bits. Final
generated checkbits,
errors) signals come from the upper slice, the IC with CODE
ID1,0=11. Control signals not shown are connected to both
units in parallel.
numbered inputs of the EDC with CODE ID1,0=10, while
Data-In bits 32 through 63 are connected to data inputs 0 to
31, respectively, for the EDC unit with CODE ID1,0=11.
below.
64-BIT DATA FORMAT
64-BIT HARDWARE CONFIGURATION
CHECKBITS–IN
SYSTEM DATA 0–31
SYSTEM DATA
63
BYTE 7
Two IDT49C465 EDC units, connected as shown below,
Data-In bits 0 through 31 are connected to the same
The 72-bit data format of data and checkbits is indicated
56 55
BYTE 6
32–63
48 47
8
BYTE 5
ERR
PCBI
CBI
P
SD
40 39
0–3
(CODE ID 1,0 = 10)
0–31
0–7
BYTE 4
LOWER EDC
and
0–7
IDT49C465
DATA
32 31
MERR
BYTE 3
CBO
SYO
(indicates multiple
24 23
0–7
0–7
BYTE 2 BYTE 1 BYTE 0
8
8
8
16 15
PARTIAL–SYNDROME
(DETECT/CORRECT)
PARTIAL–CHECKBITS
(GENERATE ONLY)
PARTIAL–CHECKBITS (CORRECT ONLY)
11.7
8 7
requires a simultaneous exchange of partial checkbits and
partial syndrome bits between the upper and lower units.
generated checkbits with the checkbits read from memory.
For example, Sn is the XOR of checkbits read and checkbits
generated. During data correction, the syndrome bits are
used to complement (correct) single-bit errors in the data bits.
For double or multiple-bit error detection, the data available as
output by the Pipeline Latch is not defined.
AC Calculations”, which illustrates the delays that are critical
to 64-bit cascaded performance. As indicated, a summation
of propagation delays is required when cascading these units.
Correction of single-bit errors in the 64-bit configuration
Syndrome bits are generated by an exclusive-OR of the
Critical AC performance data is provided in the Table “Key
0
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PCBI
CBI
P
SD
0–3
0–31
(CODE ID 1,0 = 11)
0–7
0–7
IDT49C465
C7
UPPER EDC
C6
CBO
SYO
MERR
MD
C5
ERR
0–31
0–7
0–7
CHECKBITS
C4
(DETECT AND CORRECT)
MEMORY DATA 32–63
MEMORY DATA 0–31
C3
8
(GENERATE ONLY)
FINAL CHECKBITS
C2
C1
2552 drw 17
2552 drw 18
C0
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