pi7c8150b Pericom Semiconductor Corporation, pi7c8150b Datasheet - Page 86

• Manufacturer Part Number: pi7c8150b
• Description: Asynchronous 2-port Pci Bridge
• Manufacturer: Pericom Semiconductor Corporation

06-0044
14.1.33
14.1.34
14.1.35
SECONDARY BUS ARBITER PREEMPTION CONTROL
REGISTER – OFFSET 4Ch
UPSTREAM (S TO P) MEMORY BASE REGISTER – OFFSET 50h
UPSTREAM (S TO P) MEMORY LIMIT REGISTER – OFFSET 50h
Bit
31:28
Bit
3:0
15:4
Bit
19:16
31:20
Function
Secondary bus
arbiter
preemption
contorl
Function
64 bit addressing
Upstream
Memory Base
Address
Function
64 bit addressing
Upstream
Memory Limit
Address
Type
R/W
Type
R/O
R/W
Type
R/O
R/W
Page 86 of 108
Description
Controls the number of clock cycles after frame is asserted before
preemption is enabled.
1xxx: Preemption off
0000: Preemption enabled after 0 clock cycles
0001: Preemption enabled after 1 clock cycle
0010: Preemption enabled after 2 clock cycles
0011: Preemption enabled after 4 clock cycles
0100: Preemption enabled after 8 clock cycles
0101: Preemption enabled after 16 clock cycles
0110: Preemption enabled after 32 clock cycles
0111: Preemption enabled after 64 clock cycles
Reset to 0000
Description
0: 32 bit addressing
1: 64 bit addressing
Reset to 1
Controls upstream memory base address.
Reset to 00000000h
Description
0: 32 bit addressing
1: 64 bit addressing
Reset to 1
Controls upstream memory limit address.
Reset to 000FFFFFh
ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
APRIL 2006 – Revision 2.02
PI7C8150B