s908ey16g2vfar Freescale Semiconductor, Inc, s908ey16g2vfar Datasheet - Page 186

• Manufacturer Part Number: s908ey16g2vfar
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Serial Peripheral Interface (SPI) Module
15.6.1 Overflow Error
The overflow flag (OVRF in SPSCR) becomes set if the SPI receive data register still has unread data
from a previous transmission when the capture strobe of bit 1 of the next transmission occurs. (See
Figure 15-4
receive data register so that the unread data can still be read. Therefore, an overflow error always
indicates the loss of data.
OVRF generates a receiver/error CPU interrupt request if the error interrupt enable bit (ERRIE in SPSCR)
is also set. MODF and OVRF can generate a receiver/error CPU interrupt request. (See
186
and
SCK CYCLE
NUMBER
CPHA = 1
CPHA = 0
Figure
SCK
SCK
CLOCK
CLOCK
CLOCK
CLOCK
CLOCK
BUS
BUS
BUS
BUS
BUS
MOSI
15-5.) If an overflow occurs, the data being received is not transferred to the
TO SPDR
TO SPDR
TO SPDR
TO SPDR
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
WRITE
WRITE
WRITE
WRITE
Figure 15-6. Transmission Start Delay (Master)
TO SPDR
WRITE
EARLIEST LATEST
EARLIEST
EARLIEST
EARLIEST
INITIATION DELAY FROM WRITE SPDR TO TRANSFER BEGIN
SCK = INTERNAL CLOCK ÷ 128;
INITIATION DELAY
SCK = INTERNAL CLOCK ÷ 32;
128 POSSIBLE START POINTS
SCK = INTERNAL CLOCK ÷ 2;
SCK = INTERNAL CLOCK ÷ 8;
32 POSSIBLE START POINTS
2 POSSIBLE START POINTS
8 POSSIBLE START POINTS
MSB
1
BIT 6
2
LATEST
LATEST
LATEST
BIT 5
3
Freescale Semiconductor
Figure
15-9.) It