s908ey16g2vfar Freescale Semiconductor, Inc, s908ey16g2vfar Datasheet - Page 104

• Manufacturer Part Number: s908ey16g2vfar
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Internal Clock Generator (ICG) Module
8.7.1 ICG Control Register
The ICG control register (ICGCR) contains the control and status bits for the internal clock generator,
external clock generator, and clock monitor as well as the clock select and interrupt enable bits.
104
Reset
OSCENINSTOP = 0,
STOP = 1
EXTCLKEN = 0
CMF = 1
CMON = 0
CMON = 1
CS = 0
CS = 1
ICGON = 0
ICGON = 1
ICGS = 0
ECGON = 0
ECGS = 0
IOFF = 1
EOFF = 1
N = written
TRIM = written
—
0, 1
0*, 1*
(0), (1)
us, uc, uw
Condition
Address: $0036
Register bit is forced clear or set (respectively) in the given condition.
Register bit must be clear or set (respectively) for the given condition to occur.
Register bit cannot be set, cleared, or written (respectively) in the given condition.
Register bit is unaffected by the given condition.
Register bit is temporarily forced clear or set (respectively) in the given condition.
Reset:
Read:
Write:
CMIE CMF CMON CS ICGON ICGS ECQON ECQ N[6:0] TRIM[7:0] DDIV[3:0] DSTQ[7:0]
1. See CMF bit description for method of clearing CMF bit.
(0)
(0)
us
us
—
—
—
—
—
—
—
Table 8-4. ICG Module Register Bit Interaction Summary
0
0
0
0
0
0
CMIE
Bit 7
0
(1)
(0)
(0)
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
—
—
—
—
—
—
1*
1*
0
0
0
0
0
0
= Unimplemented
Figure 8-9. ICG Control Register (ICGCR)
CMF
0
(0)
(1)
(1)
(1)
(0)
(0)
us
us
6
(1)
0
—
—
—
0
0
0
1
0
0
(0)
(1)
—
—
—
—
—
uc
us
—
—
0
0
1
0
1
0
CMON
5
0
(0)
(1)
(1)
(1)
—
—
Register Bit Results for Given Condition
—
—
—
—
—
1
1
1
1
1
1
(0)
—
—
—
—
—
—
—
—
—
—
0*
0*
0
0
0
0
CS
4
0
(0)
(1)
(1)
—
—
—
—
—
—
—
—
0
0
1
1
1
1
ICGON
3
1
(0)
—
—
—
—
—
—
—
—
—
—
—
0
0
0
0
0
ICGS
$15
uw
uw
uw
uw
—
—
—
—
—
—
—
—
—
—
—
—
2
0
ECGON
$80
uw
uw
uw
uw
—
—
—
—
—
—
—
—
—
—
—
—
1
0
Freescale Semiconductor
ECGS
uw
uw
uw
uw
uw
uw
uw
uw
Bit 0
—
—
—
—
—
—
—
—
—
0
uw
uw
uw
uw
uw
uw
uw
uw
—
—
—
—
—
—
—
—
—