s908ey16g2vfar Freescale Semiconductor, Inc, s908ey16g2vfar Datasheet - Page 177

• Manufacturer Part Number: s908ey16g2vfar
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

SBSW — SIM Break STOP/WAIT
14.8.2 SIM Reset Status Register
The SRSR register contains flags that show the source of the last reset. The status register will
automatically clear after reading it. A power-on reset sets the POR bit and clears all other bits in the
register. All other reset sources set the individual flag bits but do not clear the register. More than one
reset source can be flagged at any time depending on the conditions at the time of the internal or external
reset. For example, the POR and LVI bits can both be set if the power supply has a slow rise time.
POR — Power-On Reset Bit
PIN — External Reset Bit
COP — Computer Operating Properly Reset Bit
ILOP — Illegal Opcode Reset Bit
ILAD — Illegal Address Reset Bit (opcode fetches only)
MENRST — Forced Monitor Mode Entry Reset Bit
LVI — Low-Voltage Inhibit Reset Bit
Freescale Semiconductor
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it.
1 = Wait mode was exited by break interrupt
0 = Wait mode was not exited by break interrupt
1 = Last reset caused by POR circuit
0 = Read of SRSR
1 = Last reset caused by external reset pin RST
0 = POR or read of SPSR
1 = Last reset caused by COP counter
0 = POR or read of SRSR
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR
1 = Last reset was caused by the MENRST circuit
0 = POR or read of SRSR
1 = Last reset was caused by the LVI circuit
0 = POR or read of SRSR
Address:
Read:
Write:
POR:
$FE01
POR
Bit 7
1
Figure 14-20. SIM Reset Status Register (SRSR)
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
= Unimplemented
PIN
6
0
COP
5
0
ILOP
4
0
ILAD
3
0
MENRST
2
0
LVI
1
0
Bit 0
0
0
SIM Registers
177