mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 448
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mcf5307cft90b
Manufacturer Part Number
mcf5307cft90b
Description
Mcf5307 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5307CFT90B.pdf
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Reset Timing Specifications
20.4 Reset Timing Specifications
Table 20-7 lists specifications for the reset timing parameters shown in Figure 20-11.
Figure 20-11 shows reset timing for the values in Table 20-7.
20.5 Debug AC Timing Specifications
Table 20-8 lists specifications for the debug AC timing parameters shown in Figure 20-13.
20-12
Note: Mode selects are registered on the rising CLKIN edge before the cycle in which RSTI is
recognized as being negated.
D1
D2
D3
1
Num
R1
R2
R3
Num
RSTI and D[7:0] are synchronized internally. Setup and hold times must be met
only if recognition on a particular clock is required.
1
CLKIN
D[7:0]
RSTI
PST, DDATA to PSTCLK setup
PSTCLK to PST, DDATA hold
DSI-to-DSCLK setup
R1
Valid to CLKIN (setup)
CLKIN to invalid (hold)
RSTI to invalid (hold)
Table 20-8. Debug AC Timing Specification
Freescale Semiconductor, Inc.
Table 20-7. Reset Timing Specification
Characteristic
Characteristic
For More Information On This Product,
Figure 20-11. Reset Timing
Go to: www.freescale.com
R2
MCF5307 User’s Manual
Min
7.5
Min
7.5
7.5
3
3
1
66 MHz
66 MHz
Max
—
—
—
Max
Min
5.5
2
2
Min
5.5
5.5
90 MHz
1
90 MHz
Max
—
—
—
Max
R3
R1
PSTCLKs
Units
nS
nS
nS
Units
nS
nS
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