mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 137
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mcf5307cft90b
Manufacturer Part Number
mcf5307cft90b
Description
Mcf5307 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5307CFT90B.pdf
(484 pages)
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Table 5-5 describes ABLR fields.
Table 5-6 describes ABHR fields.
5.4.3 BDM Address Attribute Register (BAAR)
The BAAR defines the address space for memory-referencing BDM commands. See
Figure 5-7. The reset value of 0x5 sets supervisor data as the default address space.
Table 5-7 describes BAAR fields
DRc[4–0]
DRc[4–0]
31–0 Address High address. Holds the 32-bit address marking the upper bound of the address breakpoint range.
Bits
31–0
Bits
Reset
Reset
Field
Field
R/W Write only. BAAR[R,SZ] are loaded directly from the BDM command; BAAR[TT,TM] can be programmed as
R/W Write only. ABHR is accessible in supervisor mode as debug control register 0x0C using the WDEBUG
Address Low address. Holds the 32-bit address marking the lower bound of the address breakpoint range.
Name
Name
debug control register 0x05 from the external development system. For compatibility with Rev. A, BAAR is
loaded each time AATR is written.
instruction and via the BDM port using the
ABLR is accessible in supervisor mode as debug control register 0x0D using the WDEBUG instruction and
via the BDM port using the
31
R
7
Figure 5-6. Address Breakpoint Registers (ABLR, ABHR)
Breakpoints for specific addresses are programmed into ABLR.
Figure 5-7. BDM Address Attribute Register (BAAR)
6
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 5-6. ABHR Field Description
Table 5-5. ABLR Field Description
SZ
WDMREG
Chapter 5. Debug Support
.
5
Go to: www.freescale.com
command.
0x0D (ABLR); 0x0C (ABHR)
RDMREG
4
0000_0101
Address
Description
Description
0x05
TT
and
—
WDMREG
3
commands.
2
Programming Model
TM
1
0
5-9
0
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