mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 247
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mcf5307cft90b
Manufacturer Part Number
mcf5307cft90b
Description
Mcf5307 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5307CFT90B.pdf
(484 pages)
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Figure 11-8 shows the write operation with the same configuration.
11.3.3.3 Continuous Page Mode
Continuous page mode (DACRn[PM] = 11) is a type of page mode that balances
performance, complexity, and size. In typical page-mode implementations, sequential
addresses are checked for multiple hits in a DRAM block. On a hit, RAS remains asserted
and CAS is asserted with the new column address. On a miss, RAS must be precharged
again before the bus cycle begins.
Continuous page mode supports page-mode operation without requiring an address holding
register per memory block and eliminates the delay for a miss-to-precharge RAS for the
upcoming bus cycle. Because the internal MCF5307 address bus is pipelined, addresses for
RAS[1] or [0]
RAS[1] or [0]
CAS[3:0]
DRAMW
CAS[3:0]
DRAMW
BCLKO
A[31:0]
D[31:0]
BCLKO
D[31:0]
A[31:0]
Figure 11-7. Burst Page-Mode Read Operation (4-3-3-3)
Figure 11-8. Burst Page-Mode Write Operation (4-3-3-3)
Row
Row
RCD = 0
RCD = 0
Chapter 11. Synchronous/Asynchronous DRAM Controller Module
Freescale Semiconductor, Inc.
Column
Column
For More Information On This Product,
CAS = 01
CAS = 01
Go to: www.freescale.com
Column
Column
Column
Column
Asynchronous Operation
Column
Column
11-13
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