mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 175
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mcf5307cft90b
Manufacturer Part Number
mcf5307cft90b
Description
Mcf5307 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5307CFT90B.pdf
(484 pages)
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The move-to-SR and RTE instructions include an optional PST = 0x3 value, indicating an
entry into user mode. Additionally, if the execution of a RTE instruction returns the
processor to emulator mode, a multiple-cycle status of 0xD is signaled.
Similar to the exception processing mode, the stopped state (PST = 0xE) and the halted
state (PST = 0xF) display this status throughout the entire time the ColdFire processor is in
the given mode.
movec
rte
stop
wdebug
Instruction
Table 5-23. PST/DDATA Specification for Supervisor-Mode Instructions
Ry,Rc
#imm
<ea>y
Operand Syntax
Freescale Semiconductor, Inc.
For More Information On This Product,
PST = 0x1
PST = 0x7, {PST = 0xB, DD = source operand}, {PST = 3}, { PST = 0xB,
DD = source operand},
PST = 0x5, {[PST = 0x9AB], DD = target address}
PST = 0x1,
PST = 0xE
PST = 0x1, {PST = 0xB, DD = source, PST = 0xB, DD = source}
Chapter 5. Debug Support
Go to: www.freescale.com
PSTDDATA
Processor Status, DDATA Definition
5-47
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