mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 403
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mcf5307cft90b
Manufacturer Part Number
mcf5307cft90b
Description
Mcf5307 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5307CFT90B.pdf
(484 pages)
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Figure 18-17 shows a line burst write with one wait-state insertion.
Figure 18-18 shows a burst-inhibited line write. The external device executes a basic write
cycle while determining that a line is being transferred. The external device uses fast
termination to end each subsequent transfer.
OE, BWE
18.4.7.4 Transfers Using Mixed Port Sizes
Figure 18-19 shows timing for a longword read from an 8-bit port using external
termination. Figure 18-20 shows the same transfer with internal termination. For both,
SIZ[1:0] change only at the start of a new transfer because this burst is implemented as one
TM[2:0], TT[1:0]
R/W, TIP
AS, CSx
Figure 18-17. Line Write Burst (3-2-2-2) with One Wait State, Internal Termination
SIZ[1:0]
BCLKO
TM[2:0]
D[31:0]
A[31:0]
TT[1:0]
OE, BWE
TS
TA
R/W, TIP
AS, CSx
SIZ[1:0]
BCLKO
A[31:0]
D[31:0]
TS
TA
Figure 18-18. Line Write Burst-Inhibited, Internal Termination
S0
S0 S1 S2 S3
S1
A[3:2] = 00
Freescale Semiconductor, Inc.
S2 S3 S4 S5 S0 S1 S4 S5 S0 S1 S4 S5 S0 S1 S4 S5
Basic
For More Information On This Product,
Line
Write
Write
Chapter 18. Bus Operation
Go to: www.freescale.com
WS
S4 S5
A[3:2] = 01
Fast
Write
Write
WS
S6
A[3:2] = 10
Longword
S7
Fast
Write
Write
WS
S8
Data Transfer Operation
A[3:2] = 11
S9
Fast
Write
Write
WS
S10
S11
18-15
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