mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 370
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mcf5307cft90b
Manufacturer Part Number
mcf5307cft90b
Description
Mcf5307 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5307CFT90B.pdf
(484 pages)
- Current page: 370 of 484
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Overview
17-6
BCLKO
BD
BE[3:0]/BWE[3:0] Byte enable[3:0]/Byte write enable[3:0]
BG
BR
CAS[3:0]
CLKIN
CS[7:0]
CTS[1:0]
DDATA[3:0]
DRAMW
DREQ[1:0]
D[31:0]
EDGESEL
HIZ
IRQ7, IRQ5,
IRQ3, IRQ1
MTMOD[3:0]
OE
PP[15:0]
PSTCLK
PST[:0]
PS_CONFIG[1:0] Port size configuration
R/W
RAS[1:0]
RSTI
RSTO
RTS[1:0]
RxD[1:0]
SCAS
SCKE
SCL
SDA
SIZ[1:0]
Abbreviation
Table 17-2. MCF507 Alphabetical Signal Index (Continued)
Bus clock out
Bus driven
Bus grant
Bus request
Column address strobe
Clock input
Chip selects[7:0]
Clear-to-send
Debug data
DRAM write
DMA request
Data
Sync edge select
High impedance
Interrupt request
Motorola test mode
Output enable
Parallel port
Processor clock out
Processor status
Read/Write
Row address strobe
Reset In
Reset Out
Request-to-send
Receive data
Synchronous column address strobe
Synchronous clock enable
Serial clock line
Serial data line
Size
Freescale Semiconductor, Inc.
For More Information On This Product,
Signal Name
Go to: www.freescale.com
MCF5307 User’s Manual
Clock/reset
Bus arbitration
Chip select
Bus arbitration
Bus arbitration
DRAM
Clock/reset
UART
Serial module
Debug
Clock/Reset
DRAM
DMA
Bus
DRAM
Clock/Reset
Debug
Interrupt control
Debug
Chip select
Parallel port
Debug
Debug
Clock/reset
Bus
DRAM
Clock/reset
Clock/reset
Serial module
Serial module
DRAM
DRAM
I
I
Bus
2
2
C
C
Function
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
17-13
17-13
17-16
17-12
17-12
17-16
17-13
17-16
17-18
17-20
17-15
17-17
17-18
17-17
17-15
17-20
17-12
17-20
17-16
17-19
17-20
17-20
17-14
17-16
17-13
17-13
17-18
17-18
17-17
17-17
17-19
17-19
Page
17-8
17-8
17-8
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