mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 390
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mcf5307cft90b
Manufacturer Part Number
mcf5307cft90b
Description
Mcf5307 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5307CFT90B.pdf
(484 pages)
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1
Bus Characteristics
18.3 Bus Characteristics
The MCF5307 uses an input clock signal (CLKIN) to generate its internal clock. BCLKO
is the bus clock rate, where all bus operations are synchronous to the rising edge of
BCLKO. Some of the bus control signals (BE/BWE, OE, CSx, and AS) are synchronous to
the falling edge, shown in Figure 18-1. Bus characteristics may differ somewhat for
interfacing with external DRAM.
18-2
These signals change after the falling edge. In Chapter 20, “Electrical Specifications,” these signals are specified
off the rising edge because CLKIN is squared up internally.
Falling-Edge
Rising-Edge
Signal Name
IRQ[7,5,3,1]
SIZ[1:0]
TM[2:0]
TT[1:0]
BCLKO
Signals
Signals
OE
R/W
TIP
Inputs
TA
TS
t
t
t
t
vo
ho
si
hi
=Required input setup time relative to BCLKO edge
=Required input hold time relative to BCLKO edge
=Propagation delay of signal relative to BCLKO edge
=Output hold time relative to BCLKO edge
1
Figure 18-1. Signal Relationship to BCLKO for Non-DRAM Access
Table 18-1. ColdFire Bus Signal Summary (Continued)
Interrupt request
Output enable
Read/write
Transfer size
Transfer acknowledge
Transfer in progress
Transfer modifier
Transfer start
Transfer type
Freescale Semiconductor, Inc.
Description
t
si
For More Information On This Product,
t
t
vo
hi
Go to: www.freescale.com
MCF5307 User’s Manual
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O
O
O
I
O
O
O
O
MCF5307 Master
t
vo
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I
I
O
Three-state
Three-state
I
Three-state
External Master
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Rising
Falling
Rising
Rising
Rising
Rising
Rising
Rising
Rising
Edge
t
ho
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