ds26524 Maxim Integrated Products, Inc., ds26524 Datasheet - Page 219

• Manufacturer Part Number: ds26524
• Description: Ds26524 Quad T1/e1/j1 Transceiver
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 1: Open-Circuit Status (OCS). A real-time bit that is set when the LIU detects that the TTIP and TRING
outputs are open-circuited.
Bit 5: Over Equalized (OEQ). The equalizer is over equalized. This can happen if there is very large unexpected
resistive loss. This could result if monitor mode is used and the device is not placed in monitor mode. This indicator
provides more qualitative information to the receive loss indicators.
Bit 4: Under Equalized (UEQ). The equalizer is under equalized. A signal with a very high resistive gain is being
applied. This indicator provides more qualitative information to the receive loss indicators.
Bit 2: Short-Circuit Status (SCS). A real-time bit that is set when the LIU detects that the TTIP and TRING
outputs are short-circuited. The load resistance must be 25Ω (typically) or less for short-circuit detection.
Bit 0: Loss-of-Signal Status (LOSS). A real-time bit that is set when the LIU detects a LOS condition at RTIP and
RRING.
—
7
0
LRSR
LIU Real Status Register
1003h + (20h x n): where n = 0 to 3, for Ports 1 to 4
—
6
0
OEQ
5
0
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UEQ
0
4
—
3
0
SCS
2
0
OCS
1
0
LOSS
0
0