ds26524 Maxim Integrated Products, Inc., ds26524 Datasheet - Page 203

• Manufacturer Part Number: ds26524
• Description: Ds26524 Quad T1/e1/j1 Transceiver
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 2: Transmit BERT Port Direction Control (TBPDIR).
Bit 1: Transmit BERT Port Framed/Unframed Select (TBPFUS).
Bit 0: Transmit BERT Port Enable (TBPEN).
0 = Normal (line) operation. Transmit BERT port sources data into the transmit path.
1 = System (backplane) operation. Transmit BERT port sources data into the receive path (RDATA). In this
mode the data out of the transmit BERT is muxed into the receive path at RDATA (the line side of the
elastic store).
0 = The transmit BERT will not clock data into the F-bit position (framed)
1 = The transmit BERT will clock data into the F-bit position (unframed)
0 = Transmit BERT port is not active
1 = Transmit BERT port is active
—
7
0
TXPC
Transmit Expansion Port Control Register
18Ah + (200h x n): where n = 0 to 3, for Ports 1 to 4
—
6
0
—
5
0
203 of 273
—
0
4
—
3
0
TBPDIR
2
0
TBPFUS
1
0
TBPEN
0
0