ds26524 Maxim Integrated Products, Inc., ds26524 Datasheet - Page 186

• Manufacturer Part Number: ds26524
• Description: Ds26524 Quad T1/e1/j1 Transceiver
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
The Transmit Channel Idle Code Enable registers (TCICE1:TCICE4) are used to determine which of the 24 T1
channels (or 32 E1 channels) from the backplane should be overwritten with the code placed in the Transmit Idle
Code Definition register (TIDR1:TIDR32).
Bits 7 to 0: Transmit Channels 1 to 32 Code Insertion Control Bits (CH[1:32]).
0 = do not insert data from the Idle Code Array into the transmit data stream
1 = insert data from the Idle Code Array into the transmit data stream
(MSB) 7
CH16
CH24
CH32
CH8
0
CH15
CH23
CH31
CH7
TCICE1, TCICE2, TCICE3, TCICE4
Transmit Channel Idle Code Enable Registers 1 to 4
150h, 151h, 152h, 153h + (200h x n): where n = 0 to 3, for Ports 1 to 4
6
0
CH14
CH22
CH30
CH6
5
0
CH13
CH21
CH29
CH5
4
0
186 of 273
CH12
CH20
CH28
CH4
3
0
CH11
CH19
CH27
CH3
2
0
CH10
CH18
CH26
CH2
1
0
0 (LSB)
CH17
CH25
CH1
CH9
0
TCICE1
TCICE2
TCICE3
TCICE4
(E1 Mode
Only)