FDC37M81x SMSC Corporation, FDC37M81x Datasheet - Page 12

• Manufacturer Part Number: FDC37M81x
• Description: PC98/99 Compliant Enhanced Super I/O Controller
• Manufacturer: SMSC Corporation

The FDC37M81x has two power planes: VCC
and VTR.
VCC Power
The FDC37M81x is a 5 Volt part.
supply is 5 Volts (nominal). See the Operational
Description sections and the Maximum Current
Values subsection.
V
The FDC37M81x requires a 25 mA max trickle
supply (V
programmable wake-up events in the PME
interface when V
FDC37M81x is not intended to provide wake-up
capabilities on standby current, V
connected to V
configuration registers, and the PME interface.
The V
signal to initialize these components.
Note: If V
wake-up events when V
TR
SUPPORT
TR
pin generates a V
TR
CONTROL
TR
(CR24.1)
) to provide sleep current for the
PLL
is to be used for programmable
1
0
0
0
0
CC
.
CC
is removed.
V
TR
PME POWER
CC
FDC37M81x PLL CONTROLS AND SELECTS
(CR22.7)
TR
powers the PME
is removed, V
Power-on-Reset
X
0
0
1
1
POWER FUNCTIONALITY
TR
The VCC
can be
If the
PWRGOOD
INTERNAL
TR
X
0
1
0
1
12
must be at its full minimum potential at least 10
μs before V
V
difference between the two supplies must not
exceed 500mV.
Internal PWRGOOD
An internal PWRGOOD logical control is included
to minimize the effects of pin-state uncertainty in
the host interface as V
When the internal PWRGOOD signal is “1”
(active), V
interface
PWRGOOD signal is “0” (inactive), V
and the FDC37M81x host interface is inactive;
that is, ISA bus reads and writes will not be
decoded.
The FDC37M81x device pins nIO_PME, KDAT,
MDAT, IRRX, nRI1, nRI2 and RXD2 are part of
the PME interface and remain active when the
internal PWRGOOD signal has gone inactive,
provided V
TR
and V
14 MHz PLL Powered Down
Reserved
14MHz PLL Powered, Selected.
Reserved
Reserved
cc
TR
is
cc
is > 3.7V, and the FDC37M81x host
cc
is powered.
are fully powered, the potential
DESCRIPTION
begins a power-on cycle. When
active.
cc
When
cycles on and off.
the
cc
is ≤ 3.7V,
internal