MCP1726T-ADJZEMF Microchip Technology, MCP1726T-ADJZEMF Datasheet - Page 82

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MCP1726T-ADJZEMF

Manufacturer Part Number
MCP1726T-ADJZEMF
Description
Regulator, Extended Industrial, HVSON, 8-Pin|
Manufacturer
Microchip Technology
Datasheet
PIC12F683
12.3
The PIC12F683 differentiates between various kinds
of Reset:
a)
b)
c)
d)
e)
f)
Some registers are not affected in any Reset
condition; their status is unknown on POR and
unchanged in any other Reset. Most other registers
are reset to a “Reset state” on:
• Power-on Reset
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Detect (BOD)
FIGURE 12-1:
DS41211A-page 80
MCLR/V
Note 1:
Power-on Reset (POR)
WDT Reset during normal operation
WDT Reset during Sleep
Brown-out Detect (BOD)
MCLR Reset during normal operation
MCLR Reset during Sleep
CLKI pin
OSC1/
V
DD
Reset
PP
2:
pin
INTRC
This is the 32 kHz INTRC oscillator. See Section 3.0 “Oscillator Configurations” for more information.
Refer to Configuration Word Register.
OST/PWRT
Brown-out
V
Module
(1)
Detect
DD
Detect
WDT
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
Rise
OST
PWRT
(2)
10-bit Ripple Counter
WDT
Time-out
Reset
11-bit Ripple Counter
BORSEN
BOREN
Power-on Reset
External
Reset
Sleep
Advance Information
They are not affected by a WDT wake-up, since this is
viewed as the resumption of normal operation. TO and
PD bits are set or cleared differently in different Reset
situations as indicated in Table 12-2. These bits are
used in software to determine the nature of the Reset.
See Table 12-4 for a full description of Reset states of
all registers.
A simplified block diagram of the On-chip Reset Circuit
is shown in Figure 12-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Table 15-4 in Electrical
Specifications Section for pulse width specification.
Enable PWRT
Enable OST
 2003 Microchip Technology Inc.
S
R
Q
Chip_Reset

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