MCP1726T-ADJZEMF Microchip Technology, MCP1726T-ADJZEMF Datasheet - Page 110

• Manufacturer Part Number: MCP1726T-ADJZEMF
• Description: Regulator, Extended Industrial, HVSON, 8-Pin|
• Manufacturer: Microchip Technology

PIC12F683
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Description:
SUBLW
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
SUBWF
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
DS41211A-page 108
Subtract W from f
[ label ] SUBWF f,d
0
d
(f) - (W)
Subtract (2’s complement method)
W register from register ‘f’. If ‘d’ is
0, the result is stored in the W
register. If ‘d’ is 1, the result is
stored back in register ‘f’.
Subtract W from Literal
[ label ] SUBLW k
0
k - (W)
The W register is subtracted (2’s
complement method) from the
eight-bit literal ‘k’. The result is
placed in the W register.
None
TO, PD
The power-down Status bit, PD is
[ label ] SLEEP
00h
0
1
0
cleared. Time-out Status bit, TO
is set. Watchdog Timer and its
prescaler are cleared.
The processor is put into Sleep
mode with the oscillator stopped.
f
k
[0,1]
127
WDT prescaler,
TO,
PD
255
WDT,
W)
destination)
Advance Information
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Description:
XORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
XORWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Swap Nibbles in f
[ label ] SWAPF f,d
0
d
(f<3:0>)
(f<7:4>)
None
The upper and lower nibbles of
register ‘f’ are exchanged. If ‘d’ is
0, the result is placed in the W
register. If ‘d’ is 1, the result is
placed in register ‘f’.
Exclusive OR W with f
[label]
0
d
(W) .XOR. (f)
Z
Exclusive OR the contents of the
W register with register ‘f’. If ‘d’ is
0, the result is stored in the W
register. If ‘d’ is 1, the result is
stored back in register ‘f’.
(W) .XOR. k
Z
Exclusive OR Literal with W
[label]
0
The contents of the W register
are XOR’ed with the eight-bit
literal ‘k’. The result is placed in
the W register.
f
f
[0,1]
[0,1]
 2003 Microchip Technology Inc.
k
127
127
255
XORWF
XORLW k
(destination<7:4>),
(destination<3:0>)
destination)
W)
f,d