MCP1726T-ADJZEMF Microchip Technology, MCP1726T-ADJZEMF Datasheet - Page 80

• Manufacturer Part Number: MCP1726T-ADJZEMF
• Description: Regulator, Extended Industrial, HVSON, 8-Pin|
• Manufacturer: Microchip Technology

PIC12F683
12.1
The configuration bits can be programmed (read as
‘0’), or left unprogrammed (read as ‘1’) to select
various
Register 12-1. These bits are mapped in program
memory location 2007h.
REGISTER 12-1:
DS41211A-page 78
bit 13
bit 13-12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
—
Configuration Bits
device
—
Unimplemented: Read as ‘1’
FCMEN: Fail Clock Monitor Enabled bit
1 = Fail-Safe Clock Monitor is enabled
0 = Fail-Safe Clock Monitor is disabled
IESO: Internal External Switch Over bit
1 = Internal External Switch Over mode is enabled
0 = Internal External Switch Over mode is disabled
BODEN1:BODEN0: Brown-out Detect Selection bits
11 = BOD enabled
10 = BOD enabled during operation and disabled in Sleep
01 = BOD controlled by SBODEN bit (PCON<4>)
00 = BOD disabled
CPD: Data Code Protection bit
1 = Data memory code protection is disabled
0 = Data memory code protection is enabled
CP: Code Protection bit
1 = Program memory code protection is disabled
0 = Program memory code protection is enabled
MCLRE: GP3/MCLR Pin Function Select bit
1 = GP3/MCLR pin function is MCLR
0 = GP3/MCLR pin function is digital input, MCLR internally tied to V
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled and can be enabled by SWDTEN bit (WDTCON<0>)
FOSC2:FOSC0: Oscillator Selection bits
111 = RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN
110 = RC oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN
101 = INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN
100 = INTOSC oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN
011 = EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN
010 = HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN
001 = XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN
000 = LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN
Note 1:
FCMEN
2:
3:
4:
configurations,
CONFIG — CONFIGURATION WORD (ADDRESS: 2007h)
Enabling Brown-out Detect does not automatically enable Power-up Timer.
The entire data EEPROM will be erased when the code protection is turned off.
The entire program memory will be erased when the code protection is turned off.
When MCLR is asserted in INTOSC or RC mode, the internal clock oscillator is disabled.
IESO
BODEN1 BODEN0
(3)
as
shown
(2)
Advance Information
CPD
in
(4)
CP
(1)
Note:
MCLRE PWRTE WDTE
memory space. It belongs to the special
configuration
3FFFh), which can be accessed only during
programming. See PIC12F683 Program-
ming Specification for more information.
Address 2007h is beyond the user program
DD
 2003 Microchip Technology Inc.
memory
FOSC2 F0SC1
space
(2000h -
F0SC0
bit 0