MCP1726T-ADJZEMF Microchip Technology, MCP1726T-ADJZEMF Datasheet - Page 25

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MCP1726T-ADJZEMF

Manufacturer Part Number
MCP1726T-ADJZEMF
Description
Regulator, Extended Industrial, HVSON, 8-Pin|
Manufacturer
Microchip Technology
Datasheet
REGISTER 3-2:
 2003 Microchip Technology Inc.
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
OSCCON – OSCILLATOR CONTROL REGISTER (ADDRESS: 8Fh)
Unimplemented: Read as ‘0’
IRCF<2:0>: Internal Oscillator Frequency Select bits
000 = 31 kHz
001 = 125 kHz
010 = 250 kHz
011 = 500 kHz
100 = 1 MHz
101 = 2 MHz
110 = 4 MHz
111 = 8 MHz
OSTS: Oscillator Start-up Time-out Status bit
1 = Device is running from the primary system clock (FOSC<2:0>)
0 = Device is running from the secondary system clock (INTOSC or INTRC)
HTS: INTOSC (High Frequency - 8 MHz to 125 kHz) Status bit
1 = INTOSC is stable
0 = INTOSC is not stable
LTS: INTRC (Low Frequency - 31 kHz) Stable bit
1 = INTRC is stable
0 = INTRC is not stable
SCS: Oscillator Mode Select bits
1 = Internal oscillator is used for system clock
0 = Oscillator mode defined by FOSC<2:0>
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
U-0
2:
Bit resets to ‘0’ with Two-speed Start-up and LP, XT or HS selected, as the Oscilla-
tor mode or Fail-Safe mode is enabled.
WDT does not update LTS status bit.
IRCF2
R/W-1
Advance Information
R/W-1
IRCF1
W = Writable bit
‘1’ = Bit is set
R/W-0
IRCF0
OSTS
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
(1)
HTS
R-0
PIC12F683
x = Bit is unknown
LTS
R-0
DS41211A-page 23
R/W-0
SCS
bit 0

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