MCP1726T-ADJZEMF Microchip Technology, MCP1726T-ADJZEMF Datasheet - Page 55

• Manufacturer Part Number: MCP1726T-ADJZEMF
• Description: Regulator, Extended Industrial, HVSON, 8-Pin|
• Manufacturer: Microchip Technology

8.3.2
The PWM duty cycle is specified by writing to the
CCPR1L register and to the CCP1CON<5:4> bits. Up
to 10-bit resolution is available. The CCPR1L contains
the eight MSbs and the CCP1CON<5:4> contains the
two LSbs. This 10-bit value is represented by
CCPR1L:CCP1CON<5:4>. The following equation is
used to calculate the PWM duty cycle in time.
EQUATION 8-2:
CCPR1L and CCP1CON<5:4> can be written to at any
time, but the duty-cycle value is not latched into
CCPR1H until after a match between PR2 and TMR2
occurs (i.e., the period is complete). In PWM mode,
CCPR1H is a read-only register.
The CCPR1H register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitch-free PWM operation.
When the CCPR1H and 2-bit latch match TMR2,
concatenated with an internal 2-bit Q clock, or 2 bits of
the TMR2 prescaler, the CCP1 pin is cleared.
The maximum PWM resolution (bits) for a given PWM
frequency is given by the following formula.
TABLE 8-3:
 2003 Microchip Technology Inc.
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
PWM duty cycle
PWM Frequency
PWM DUTY CYCLE
=
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 20 MHz
TMR2 prescale value
CCPR1L:CCP1CON<5:4>
1.22 kHz
0xFFh
16
10
Advance Information
T
OS C
4.88 kHz
0xFFh
10
4
EQUATION 8-3:
8.3.3
The following steps should be taken when configuring
the CCP1 module for PWM operation:
1.
2.
3.
4.
5.
19.53 kHz
Note:
Note:
0xFFh
Resolution
Set the PWM period by writing to the PR2
register.
Set the PWM duty cycle by writing to the
CCPR1L register and CCP1CON<5:4> bits.
Make the CCP1 pin an output by clearing the
TRISIO<2> bit.
Set the TMR2 prescale value and enable Timer2
by writing to T2CON.
Configure the CCP1 module for PWM operation.
10
1
If the PWM duty cycle value is longer than
the PWM period, the CCP1 pin will not be
cleared.
SETUP FOR PWM OPERATION
The PWM module may generate a prema-
ture pulse when changing the duty cycle.
For sensitive applications, disable the
PWM module prior to modifying the duty
cycle.
=
78.12kHz
0x3Fh
log
------------------------------------------------------------------------------------------ - bits
1
8


---------------------------------------------------------------------------- -
F
P WM
PIC12F683
TMR2 prescale value
156.3 kHz
log
0x1Fh
F
O S C
1
7
2
DS41211A-page 53
208.3 kHz
0x17h
6.6


1