MCP1726T-ADJZEMF Microchip Technology, MCP1726T-ADJZEMF Datasheet - Page 23

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MCP1726T-ADJZEMF

Manufacturer Part Number
MCP1726T-ADJZEMF
Description
Regulator, Extended Industrial, HVSON, 8-Pin|
Manufacturer
Microchip Technology
Datasheet
3.5
The PIC12F683 includes an oscillator block with two
independent internal oscillators; a calibrated INTOSC
(8 MHz) and an uncalibrated INTRC (31 kHz). The
8 MHz INTOSC also drives the INTOSC postscaler,
which can provide a range of six clock frequencies from
125 kHz to 4 MHz. Therefore, the oscillator block can
provide the following frequencies as the system clock:
31 kHz, 125 kHz, 256 kHz, 512 kHz, 1 MHz, 2 MHz,
4 MHz and 8 MHz.
The INTRC (31 kHz) oscillator is enabled by selecting
the INTRC as the system clock source, or when any of
the following are enabled:
• Power-up Timer (PWRT)
• Watchdog Timer (WDT)
• Two-speed Start-up (if IRCF = ‘000’).
• Fail-Safe Clock Monitor (FSCM)
The INTOSC (8 MHz) oscillator is enabled by selecting
the INTOSC as the system clock source, or when
Two-speed Start-up is enabled, if IRCF
These features are discussed in greater detail in
Section 12.0 “Special Features of the CPU”.
The clock source frequency (INTOSC direct, INTRC
direct, or INTOSC postscaler) is selected by
configuring the IRCF bits of the OSCCON register.
3.5.1
Using the internal oscillator as the clock source can
eliminate the need for up to two external oscillator pins,
after which it can be used for digital I/O. Two distinct
configurations are available:
• In INTOSC mode, the OSC2 pin outputs F
• In INTOSCIO mode, OSC1 functions as GP5 and
 2003 Microchip Technology Inc.
Note:
while OSC1 functions as GP5 for digital input and
output.
OSC2 functions as GP4, both for digital input and
output.
Internal Oscillator Block
Throughout this data sheet, when referring
specifically to a generic clock source, the
term “INTOSC” may also be used to refer
to the Clock modes using the internal
oscillator block. This is regardless of
whether the actual frequency used is
INTOSC (8 MHz), the INTOSC postscaler
(4 MHz to 125 kHz) or INTRC (31 kHz).
INTOSC MODES
‘000’.
Advance Information
OSC
/4,
3.5.2
The PIC12F683 has two internal oscillators. The 8 MHz
INTOSC and a 31 kHz INTRC oscillator. The 8 MHz
INTOSC is factory calibrated. See Section 15.0 “Elec-
trical Specifications”, for information on variation
over voltage and temperature. The 31 kHz INTRC is
uncalibrated.
The PIC12F683 stores the INTOSC calibration values
in fuses located in the calibration word (2008h). The
calibration word is not erased using the specified bulk
erase sequence in the PIC12F683 Programming
Specification and does not require reprogramming.
3.5.3
The internal oscillator’s output has been calibrated at the
factory, but can be adjusted in the application. This is
done by writing to the OSCTUNE register (Register 3-1).
The OSCTUNE register has a tuning range of ±12%.
Due to process variation, the monotonicity and
frequency step can not be specified.
When the OSCTUNE register is modified, the INTOSC
frequency will begin shifting to the new frequency.
OSCTUNE does not affect the INTRC frequency. The
INTOSC clock will stabilize within 1 ms. Code execution
continues during this shift. There is no indication that the
shift has occurred. Operation of features that depend on
the 31 kHz INTRC clock source frequency, such as the
WDT, Fail-Safe Clock Monitor and peripherals, will not
be affected by the change in frequency.
Note:
INTOSC CALIBRATION
memory space. It belongs to the special
Configuration Memory space (2000h -
3FFFh), which can be accessed only during
programming. See PIC12F683 Program-
ming Specification for more information.
OSCTUNE REGISTER
Address 2008h is beyond the user program
PIC12F683
DS41211A-page 21

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