MT92210 Zarlink Semiconductor, MT92210 Datasheet - Page 44

• Manufacturer Part Number: MT92210
• Description: 1023 Channel Voice Over ip (VoIP) Processor
• Manufacturer: Zarlink Semiconductor

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In HDLC, when a packet completes, its HDLC stream number is used to index in the HDLC Stream to HDLC
Address LUT structure, and from there its HDLC address is used to index into the HDLC Address LUT. This
structure, in turn, will point to the TX Connection structure that will be used by the packet assembly block to create
the packet. An event is generated directly into the Assembly Event Queue; from there, the packet assembly module
reads the event (and with it the address of the TX Connection Structure), then reads the packet payload itself from
the HDLC circular buffer, creates the complete packet and writes its data into the Packet Assembly Data FIFO; it
also writes the control associated to it in the Packet Assembly Control FIFO.
For xxPCM channels, the originator of the Assembly Events is the Service Timer. The Service Timer process scans
all the Service Indicator tables and when it hits a valid indicator, writes an assembly event in the assembly event
queue. From here it goes to the packet assembly process where a TX Connection structure is used to assemble the
packet. The TX Connection structure may point to a TX Silence Suppression structure that would be used to
perform silence suppression on the xxPCM samples.
In both HDLC and xxPCM, if the packet is RTP, a TX RTP Header Structure will be used to assemble the correct
headers at the beginning of the packet. The TX RTP header structure contains the data values of all the headers,
all the information needed to assemble the variable headers of the packet, as well as the packet’s destination.
TX TDM process: Takes bytes from H.110 and writes them into the
TX TDM process: Takes bytes from H.110 and writes them into the
appropriate circular buffers; does HDLC de-framing and law
appropriate circular buffers; does HDLC de-framing and law
translation on PCM values.
translation on PCM values.
TDM Byte (From H.110)
TDM Byte (From H.110)
per TSST) TXTDM0
per TSST) TXTDM0
TX HDLC Stream
TX HDLC Stream
Stream) TXTDM1
Stream) TXTDM1
Memory (1 entry
Memory (1 entry
Buffer Structure
Buffer Structure
Structure (1 per
Structure (1 per
(1 per Bearer)
(1 per Bearer)
TX Channel
TX Channel
Association
Association
TX xxPCM
TX xxPCM
TXTDM1
TXTDM1
Zarlink Semiconductor Inc.
Figure 20 - Tx Flow 1
Process
Process
TX TDM
TX TDM