MT92210 Zarlink Semiconductor, MT92210 Datasheet - Page 29

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MT92210

Manufacturer Part Number
MT92210
Description
1023 Channel Voice Over ip (VoIP) Processor
Manufacturer
Zarlink Semiconductor
Datasheet
Data Sheet
There are multiple cell queues in the chip: 4 going to TX A, 2 going to TX B, and 1 to the RX CPU. Each one of
them keeps a list of cells pointed to in external memory. Each cell queue is of a programmable 2
cells (4K bytes) and 8K cells (512K bytes). If a cell queue overflows, a status bit will be flagged in registers.
As is the case with packets, a cell handler module manages the read and write pointers to the queues. However,
instead of being contained in a small internal memory, all pointers and configuration of each cell queue is contained
in registers. However, a small internal memory is used to prefetch pointer to cells destined to each queue to prevent
starvation. The format of this memory is described in the following figure.
+1C
+2C
+3C
+10
+14
+18
+20
+24
+28
+30
+34
+38
+C
+0
+4
+8
Link to Next Free Cell
b31
b30
b29
Field
b28
b27
b26
b25
b24
Points to the next free cell in SSRAM.
b23
b22
Figure 10 - Raw Cell Format (free cell)
Table 10 - Fields and Description
b21
b20
b19
Zarlink Semiconductor Inc.
b18
b17
Cell Header[31:0]
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
b16
b15
b14
Description
b13
b12
b11
b10
Link to Next Free Cell [20:6]
b9
b8
b7
b6
b5
b4
n
size between 64
b3
MT92210
b2
b1
b0
29

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