MT92210 Zarlink Semiconductor, MT92210 Datasheet - Page 111

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MT92210

Manufacturer Part Number
MT92210
Description
1023 Channel Voice Over ip (VoIP) Processor
Manufacturer
Zarlink Semiconductor
Datasheet
Data Sheet
9.0
This chapter describes the data paths for all bytes transmitted and received with the H.110 interface.
9.1
The TX TDM section of the chip takes bytes from the H.110 interface and writes them into circular buffers in
SSRAM A. To do so, the MT92210 uses the TX Channel Association Memory to decide which of the 1023 time
slots on the H.110 bus it wants to treat. Each entry in the TX Channel Association Memory associates a time slot
with either a PCM buffer or an HDLC stream; the chip can support up to 1023 PCM buffers or up to 512 HDLC
streams, or any combination of the two (two PCM buffers cost the same as 1 HDLC stream). Any of the 1023 time
slots supported can also be configured as Low Latency Loopback: this means that the time slot will simply be
looped back onto another time slot on the H.110 bus.
This is the format of the TX Channel Association Memory:
Stream/Buffer
Tag
AS
TSST
Link to next
entry
Field
TX/RX TDM Data Paths
TX TDM Data Path
Encoded field that points either to the TX TDM Control memory (for xxPCM Buffer and HDLC
stream) or to the Low-Latency Loopback Memory for Low-Latency Loopback channels.
Associated Stream. When set, the least significant bit of the TSST number will be ignored and
both even and odd streams pointed to by the TSST number will be read for valid data. For
xxPCM circular buffers, the extra stream allows PCM / ADPCM codec changes to occur
smoothly. For HDLC streams, the extra stream doubles the bandwidth that is available on the
HDLC stream.
Time / Stream Number. TSST[11:5] represents the timeslot on which the data belonging to an
HDLC stream or to an xxPCM buffer will be received from. TSST[4:0] represents the stream
on which the data belonging to an HDLC stream or to an xxPCM buffer will be received from.
Pointer to the next TX Channel Association Memory Entry. Entries must be sorted according
to TSST number. Entry 0 is never considered to contain a Buffet Tag; it’s TSST is hardcoded
in the chip as number -1, which means that the last TX Channel Association Memory Entry
must point back to Entry 0 to be ready for the next frame.
+0
+2
+4
+6
TX Channel Association Memory Entry
b 15
AS
b14
b13
Figure 57 - TX Channel Association Memory
81FF0h
81FF8h
80000h
80008h
b12
Table 39 - Fields and Description
b11
b10
Zarlink Semiconductor Inc.
b9
b8
Entry 1022
Entry 1023
Entry 0
Entry 1
b7
Stream/Buffer Tag
TSST [11:0]
Link to Next Entry
Description
b6
b5
b4
b3
b2
b1
b0
MT92210
111

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