MT92210 Zarlink Semiconductor, MT92210 Datasheet - Page 28

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MT92210

Manufacturer Part Number
MT92210
Description
1023 Channel Voice Over ip (VoIP) Processor
Manufacturer
Zarlink Semiconductor
Datasheet
28
destination. Packets from the packet assembly module can be routed to any one of the TX link buffers or to the
packet identifier for internal loopback functionality.
Packets going to the disassembly module use a similar scheme: a 2K-byte memory is used for the packets and a
128-byte memory for the handles.
Near the TX link layer interface, the network module uses 512-byte buffers to transfer packets between the SDRAM
and the link layer interfaces. There are 4 buffers used for this purpose: 1 destined to TX link A, 1 to TX link B, 1 from
RX link A and 1 from RX link B. These buffers can be smaller because the system operates flawlessly even if the
entire packet is not contained in the buffer at any one time.
Cells contained in external memory are stored in the SSRAM and free cells are allocated as the various modules
within the chip request them. The cells are also managed in a linked list, in the same way as the packet are.
However, since each cell is individual (i.e. not part of a packet comprised of many blocks) they are only linked when
they are free: when a cell is allocated and contains valid data, its link is not used. Whenever cells are allocated, the
pointer to the cell is added to a cell queue, which contains all cells going to a given destination. The following
figures indicate the format of raw cells in queues, depending on whether the cell is allocated or free:
+1C
+2C
+3C
+10
+14
+18
+20
+24
+28
+30
+34
+38
+C
+0
+4
+8
Multicast Sum
AAL5 VC Number
PN
b31
b30
Multicast Sum
Field
b29
b28
b27
b26
Used in TX. When Cell is queued in multiple TX queues this is decremented each
time the cell is sent and the TX queue that decrements it to 0 frees the cell memory.
This points to a Packet Reassembly structure.
FIFO, where cells originated. “00” = RX port A, “01” = RX port B; “11” = TX CPU.
Port Number. Used in RX. Source port of this cell. Used to indicate, in the RX AAL0
b25
b24
b23
b22
Figure 9 - Raw Cell Format (used cell)
b21
Table 9 - Fields and Description
b20
b19
Zarlink Semiconductor Inc.
b18
Cell Header[31:0]
b17
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
Cell Payload
PN
b16
b 15
Description
b14
b13
b12
b11
AAL5 VC Number [15:0]
b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0

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