MT28C6428P20 Micron Semiconductor Products, Inc., MT28C6428P20 Datasheet - Page 2

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MT28C6428P20

Manufacturer Part Number
MT28C6428P20
Description
4 Meg X 16 Asynchronous/page Flash 512K X 16 SRAM Combo Memory
Manufacturer
Micron Semiconductor Products, Inc.
Datasheet
GENERAL DESCRIPTION
nation Flash and SRAM memory devices provide a com-
pact, low-power solution for systems where PCB real
estate is at a premium. The dual-bank Flash devices
are high-performance, high-density, nonvolatile
memory with a revolutionary architecture that can sig-
nificantly improve system performance.
by configuring soft protection registers with dedicated
command sequences. For security purposes, dual 64-
bit chip protection registers are provided.
functions are fully automated by an on-chip write state
machine (WSM). The WSM simplifies these operations
and relieves the system processor of secondary tasks.
An on-chip status register, one for each bank, can be
used to monitor the WSM status to determine the
progress of a PROGRAM/ERASE command.
compatibility with existing EEPROM emulation soft-
ware packages.
source for the Flash memory (F_V
power source for the SRAM (S_V
for optimized power consumption and improved noise
immunity. A dedicated I/O power supply (V
vided with an extended range (1.70V–2.20V), to allow a
direct interface to most common logic controllers and
to ensure improved noise immunity. The separate
S_V
bility when required. The data retention S_V
4 Meg x 16 Asynchronous/Page Flash 512K x 16 SRAM Combo Memory
MT28C6428P20_3.p65 – Rev. 3, Pub. 7/02
The MT28C6428P20 and MT28C6428P18 combi-
This new architecture features:
• A two-memory-bank configuration supporting
• A high-performance bus interface providing a fast
• A conventional asynchronous bus interface.
The devices also provide soft protection for blocks
The embedded WORD WRITE and BLOCK ERASE
The erase/program suspend functionality allows
The devices take advantage of a dedicated power
CC
dual-bank operation;
page data transfer; and
pin for the SRAM provides data retention capa-
PART NUMBER
MT28C6428P20FM-80 BET
MT28C6428P20FM-80 TET
MT28C6428P18FM-85 BET
MT28C6428P18FM-85 TET
Cross Reference for Abbreviated Device Marks
CC
), both at 1.70V–2.20V
CC
) and a dedicated
CC
CC
Q) is pro-
4 MEG x 16 ASYNCHRONOUS/PAGE FLASH
is speci-
MARKING
PRODUCT
FW454
FW453
FW455
FW452
Table 1
512K x 16 SRAM COMBO MEMORY
2
fied as low as 1.0V. The MT28C6428P20 and
MT28C6428P18 devices support two F_V
ranges, an in-circuit voltage of 0.9V–2.2V and a produc-
tion compatibility voltage of 12V ±5%. The 12V ±5%
F_V
cumulative hours.
an asynchronous 8Mb SRAM organized as 512K-words
by 16 bits. The devices are fabricated using an ad-
vanced CMOS process and high-speed/ultra-low-
power circuit technology, and then are packaged in a
67-ball FBGA package with 0.80mm pitch.
ARCHITECTURE AND MEMORY
ORGANIZATION
memory (bank a and bank b) for simultaneous READ
and WRITE operations, which are available in the fol-
lowing bank segmentation configuration:
organizations.
DEVICE MARKING
part number is not printed on the top of each device.
Instead, an abbreviated device mark comprised of a
five-digit alphanumeric code is used. The abbreviated
device marks are cross referenced to Micron part num-
bers in Table 1.
MARKING
SAMPLE
FX454
FX453
FX455
FX452
The MT28C6428P20 and MT28C6428P18 contain
The Flash devices contain two separate banks of
• Bank a comprises one-fourth of the memory and
• Bank b represents three-fourths of the memory, is
Figures 2 and 3 show the bottom and top memory
Due to the size of the package, Micron’s standard
PP
contains 8 x 4K-word parameter blocks, while the
remainder of bank a is split into 31 x 32K-word
blocks.
equally sectored, and contains 96 x 32K-word
blocks.
2
is supported for a maximum of 100 cycles and 10
Micron Technology, Inc., reserves the right to change products or specifications without notice.
SAMPLE MARKING
MECHANICAL
FY454
FY453
FY455
FY452
©2002, Micron Technology, Inc.
ADVANCE
PP
voltage

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