HFC-SPCI Cologne Chip AG, HFC-SPCI Datasheet - Page 41

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HFC-SPCI

Manufacturer Part Number
HFC-SPCI
Description
Isdn S/t HDLC Basic Rate Controller
Manufacturer
Cologne Chip AG
Datasheet
6URbeQbi !)))
Name
STATUS
Reading the STATUS register clears no bit.
Addr.
70h
Bits
0
1
2
3
4
5
6
7
r/w Function
r
r
r
r
r
r
r
r
always '0'
processing/non processing status
'1' the HFC-S PCI is in processing phase (every 125µs)
'0' the HFC-S PCI is not in processing phase
processing/non processing transition interrupt status
'1' The HFC-S PCI has finished internal processing phase
always '0'
timer status
'0' timer not elapsed
'1' timer elapsed
TE/NT state machine interrupt state
'1' state of state machine has changed
FRAME interrupt has occured (any data channel interrupt)
all masked D-channel and B-channel interrupts are "ored"
ANY interrupt
all masked interrupts are "ored"
(every 125µs)
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