HFC-SPCI Cologne Chip AG, HFC-SPCI Datasheet - Page 13

• Manufacturer Part Number: HFC-SPCI
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

3
3.1
3.1.1
Table 1: PCI command types
3.1.2
The HFC-S PCI supports both target mode and master mode. Before the HFC-S PCI can operate in
master mode the 32K Memory Window Base Address register (MWBA) must be configured.
Afterwards all FIFO data accesses are done by the HFC-S PCI automatically by PCI master accesses.
Only control and configuration register accesses must be done by PCI target accesses by the host CPU.
3.1.3 PCI buffer signaling and power supply environment
The HFC-S PCI supports 5V and 3.3V PCI bus environments. The environment mode is set during
RESET (RST# low) by the input value of /ADR_WR.
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6URbeQbi !)))
C/BE3#
power and signaling
0
0
0
0
1
1
environment
external pull-up resistor required (10k)
Functional description
PCI-interface
PCI access types used by HFC-S PCI
PCI modes supported
PCI bus
3.3V
5V
C/BE2#
0
0
1
1
0
0
C/BE1#
1
1
1
1
1
1
during RST# low
/ARD_WR
C/BE0# Command Type
high
low
1
0
0
1
0
1
*)
I/O Read
I/O Write
Memory Read
Memory Write
Configuration Read
Configuration Write
HFC-S PCI mode
target mode
target mode
target mode and master mode
target mode and master mode
target mode
target mode
!# _V &$