HFC-SPCI Cologne Chip AG, HFC-SPCI Datasheet - Page 30

• Manufacturer Part Number: HFC-SPCI
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

4
4.1
# _V &$
Name
STATES
*
The state machine is stuck to '0' after a reset. Writing a '0' to bit 4 of the STATES register restarts
the state machine.
In this state the HFC-S PCI sends no signal on the S/T-line and it is not possible to activate it by
incoming INFOx.
NT mode: The NT state machine does not change automatically from G2 to G3 if the TE side
sends INFO3 frames. This transition must be activated each time by bit 7 of the STATES register.
important!
Register bit description
Register bit description of S/T section
Addr.
C0h
Bits
3..0
4
5
6
7
r/w Function
w
w
w
w
w
r
binary value of actual state (NT: Gx, TE: Fx)
prepare for new state xxxx
'1' loads the prepared state (bit 3..0) and stops the state
'0' enables the state machine.
'0' prepare deactivation
'1' prepare activation
'1' start activation/deactivation as selected by bit 5
This bit is automatically cleared after activation/deactivation.
'0' no operation
'1' in NT mode allows transition from G2 to G3.
This bit is automatically cleared after the transition.
machine.This bit needs to be set for a minimum period of
5.21
(reset default)
After writing an invalid state the state machine goes to
deactivated state (G1, F2)
P
s and must be cleared by software.
6URbeQbi !)))