XR16L784 Exar Corporation, XR16L784 Datasheet - Page 15
![no-image](/images/manufacturer_photos/0/2/243/exar_corporation_sml.jpg)
XR16L784
Manufacturer Part Number
XR16L784
Description
High Performance 5V And 3.3V Quad Uart
Manufacturer
Exar Corporation
Datasheet
1.XR16L784.pdf
(43 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XR16L784CV
Manufacturer:
ST
Quantity:
455
Company:
Part Number:
XR16L784CV-F
Manufacturer:
LT
Quantity:
1 236
Company:
Part Number:
XR16L784CV-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
XR16L784CV-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
Company:
Part Number:
XR16L784CVTR-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Company:
Part Number:
XR16L784IV-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
XR16L784IV-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
Each UART in the 784 includes the infrared encoder
and decoder compatible to the IrDA (Infrared Data
Association) version 1.1. The input pin ENIR conve-
niently activates all 4 UART channels to start up in
the infrared mode. This global control pin enables the
MCR bit-6 function in every UART channel register.
After power up or a reset, the software can overwrite
MCR bit-6 if so desired. ENIR and MCR bit-6 also
disable the receiver while the transmitter is sending
data. This prevents echoed data from reaching the
receiver. The global activation ENIR pin prevents the
infrared emitter from turning on and drawing large
amount of current while the system is starting up.
F
4.3 I
IGURE
The local UART (UARTA) starts data transfer by asserting RTSA# (1). RTSA# is normally connected to CTSB# (2) of
remote UART (UARTB). CTSB# allows its transmitter to send data (3). TXB data arrives and fills UARTA receive FIFO
(4). When RXA data fills up to its receive FIFO trigger level, UARTA activates its RXA data ready interrupt (5) and con-
tinues to receive and put data into its FIFO. If interrupt service latency is long and data is not being unloaded, UARTA
monitors its receive data fill level to match the upper threshold of RTS delay and de-assert RTSA# (6). CTSB# follows
(7) and request UARTB transmitter to suspend data transfer. UARTB stops or finishes sending the data bits in its transmit
shift register (8). When receive FIFO data in UARTA is unloaded to match the lower threshold of RTS delay (9), UARTA
re-asserts RTSA# (10), CTSB# recognizes the change (11) and restarts its transmitter and data flow again until next re-
ceive FIFO trigger (12). This same event applies to the reverse direction when UARTA sends data to UARTB with RTSB#
and CTSA# controlling the data flow.
NFRARED
8. A
(RXA FIFO
CTSB#
RXA FIFO
Interrupt)
RTSA#
TXB
INTA
UTO
Trigger Reached
Receiver FIFO
Trigger Level
Local UART
Transmitter
M
Auto CTS
Auto RTS
RTS/DTR
UARTA
Monitor
ODE
Data Starts
Receive
Data
Assert RTS# to Begin
AND
1
2
Transmission
Trigger Level
3
4
CTS/DSR F
RX FIFO
RTSA#
TXA
CTSA#
RXA
ON
ON
LOW
5
C
7
Threshold
RTS High
ONTROL
15
6
8
When the infrared feature is enabled, the transmit da-
ta outputs, TX[3:0], would idle at logic zero level.
Likewise, the RX [3:0] inputs assume an idle level of
logic zero.
The infrared encoder sends out a 3/16 of a bit wide
HIGH-pulse for each “0” bit in the transmit data
stream. This signal encoding reduces the on-time of
the infrared LED, hence reduces the power consump-
tion. See
The infrared decoder receives the input pulse from
the infrared sensing diode on RX pin. Each time it
senses a light pulse, it returns a logic zero to the data
bit stream. The decoder also accepts (when FCTR
HIGH PERFORMANCE 5V AND 3.3V QUAD UART
O
OFF
Suspend
PERATION
OFF
Figure 9
RTSB#
CTSB#
Threshold
RTS Low
RXB
TXB
Restart
9
below.
10
11
Trigger Reached
ON
Remote UART
Trigger Level
Receiver FIFO
12
Auto CTS
Auto RTS
Transmitter
UARTB
Monitor
ON
Trigger Level
RX FIFO
R T S C T S 1
XR16L784
REV. 1.0.1