IDT82V2048 Integrated Device Technology, Inc., IDT82V2048 Datasheet - Page 50

• Manufacturer Part Number: IDT82V2048
• Manufacturer: Integrated Device Technology, Inc.

TRANSCEIVER TIMING CHARACTERISTICS
IDT82V2048 OCTAL T1/E1 SHORT HAUL LINE INTERFACE UNIT
NOTE:
1. Relative to nominal frequency, MCLK=+/-100 ppm
2. RCLK duty cycle widths will vary depending on extent of received pulse jitter displacement. Maximum and minimum RCLK duty cycles are for worst case jitter conditions (0.2UI
displacement for E1 per ITU G.823).
3. For all digital outputs. C load = 15 pF
4. Clock recovery is disabled in this mode.
Transmit path
t1
t2
Receive path
t4
t5
t6
t7
t8
t9
Symbol
MCLK frequency
E1:
T1:
MCLK tolerance
MCLK duty cycle
TCLK frequency
E1:
T1:
TCLK tolerance
TCLK Duty Cycle
Transmit Data Setup Time
Transmit Data Hold Time
Delay time of OE low to driver High Z
Delay time of TCLK low to driver High Z
Clock recovery capture range
RCLK duty cycle
RCLK pulse width
E1:
T1:
RCLK pulse width low time
E1:
T1:
RCLK pulse width high time
E1:
T1:
Rise/fall time
Receive Data Setup Time
E1:
T1:
Receive Data Hold Time
E1:
T1:
RDN/RDP pulse width (MCLK = H)
E1:
T1:
(3)
(2)
Parameter
(2)
(1)
E1
T1
(4)
50
-100
Min
457
607
203
259
203
259
200
200
200
200
200
300
-50
40
10
40
40
40
40
20
+/- 180
+/- 80
2.048
1.544
2.048
1.544
Typ
488
648
244
324
244
324
244
324
244
324
244
324
44
50
INDUSTRIAL TEMPERATURE RANGES
Max
100
+50
519
689
285
389
285
389
60
90
48
60
1
MHz
MHz
Unit
ppm
ppm
ppm
ns
ns
us
us
ns
ns
ns
ns
ns
ns
ns
%
%
%