L9803 STMicroelectronics, L9803 Datasheet - Page 95

• Manufacturer Part Number: L9803
• Description: Super Smart Power Motor Driver With 8-bit Mcu, Ram, Eeprom, Adc, Wdg, Timers, Pwm And H-bridge Driver
• Manufacturer: STMicroelectronics

L9803
Figure 45. Power Bridge Schematic
EN bit in BCSR is the main enable signal, active high. If EN = 0, all the bridge transistors are
switched off (UL, UR, DL and DR are reset) and the outputs OUTL and OUTR are in high
impedance state.
Being '0' the status after reset of EN, the bridge is in safe condition (OUTL=OUTR=Z).
Therefore the safe condition is guaranteed in undervoltage condition (LVD reset) and in
case of main clock (Safeguard reset) or software (Watchdog reset) failures.
Each power DMOS has its own over current detector circuit generating SC_xx signals (see
Figure
SC flag is then set by hardware as soon as one of the two outputs (or both) are short to
battery, ground or if the two outputs are short together (load short). This read only bit is
reset only by clearing the EN bit. The rising edge of SC causes an interrupt request if the
PIE bit is set in BCSR register.
When the current monitored in any of the four DMOS of the bridge exceeds limit threshold
(I
function is dominant over any write from data bus by software (i. e. as long as SC is set, the
bridge cannot be switched on).
To switch the bridge on again the EN bit must be cleared by software. This resets the SC bit.
Setting again EN, the bridge is switched on. If the overcurrent condition is still present, SC is
set again (and a interrupt is generated when enabled).
An internal thermal protection circuit monitors continuously the temperature of the device
and drives the OVT bit in BCSR register and, in turn, the OVT signal in
The OVT flag is set as soon as the temperature of the chip exceeds Thw and all the
transistor of the bridge are switched off. This rising edge causes an interrupt request if the
PIE bit is set. This read only bit is reset only by clearing the EN bit. This function is dominant
over any write from data bus by software (i. e. as long as OVT is set the bridge cannot be
switched on).
To switch the bridge on again the EN bit must be cleared by software. This resets the OVT
bit. Setting again EN, the bridge is switched on. If the overtemperature condition is still
present, OVT is set again (and a interrupt is generated when enabled).
SC
), the SC bit is set and the corresponding DMOS is switched off after
UL
DL
45). SC_xx signals are ORed together to generate SC flag in BCSR register.
OVT
SC_UL
OVT
SC_DL
PGND
VBL
OUTL
OUTR
VBR
PGND
On-Chip Peripherals
SC_DR
SC_UR
Figure
OVT
OVT
t
SCPI
time. This
45.
UR
DR
95/126