L9803 STMicroelectronics, L9803 Datasheet - Page 101

• Manufacturer Part Number: L9803
• Description: Super Smart Power Motor Driver With 8-bit Mcu, Ram, Eeprom, Adc, Wdg, Timers, Pwm And H-bridge Driver
• Manufacturer: STMicroelectronics

L9803
5.9.2
Figure 47. EEPROM Block Diagram
Functional description
Read operation (E2LAT=0)
The EEPROM can be read as a normal ROM/RAM location when the E2LAT bit of the CR
register is cleared. The address decoder selects the desired byte. The 8 sense amplifiers
evaluate the stored byte which is put on the data bus.
Write operation (E2LAT=1)
The EEPROM programming flowchart is shown in
To access the write mode, the LAT with E2LAT bit has to be set by software (the E2PGM bit
remains cleared). When a write access to the EEPROM area occurs, the value is latched
inside the 16 data latches according to its address.
When E2PGM bit is set by the software, all the previous bytes written in the data latches (up
to 16) are programmed in the EEPROM cells. The effective high address (row) is
determined by the last EEPROM write sequence. To avoid wrong programming, the user
must take care that all the bytes written between two programming sequences have the
same high address: only the four Least Significant Bits of the address can change.
REQUEST
INTERRUPT
EEPCR
ADDRESS
BUS
DETECTOR
FALLING
EDGE
E2ITE E2LAT E2PGM
DECODER
ADDRESS
4
12
Read amplifiers
MULTIPLEXER
DECODER
DATA
8 bit
ROW
32
8
Figure
4
.
.
.
.
.
.
49.
BUFFER
HIGH VOLTAGE PUMP
1 ROW = 4 * 8 BITS
DATA LATCHES
MEMORY
EEPROM
MATRIX
4*8 BITS
On-Chip Peripherals
8
32
DATA
101/126
BUS