P89LPC915_916_917 NXP Semiconductors, P89LPC915_916_917 Datasheet - Page 48

• Manufacturer Part Number: P89LPC915_916_917
• Description: The P89LPC915/916/917 are single-chip microcontrollers, available in low-cost packages,based on a high performance processor architecture that executes instructions in two tofour clocks, six times the rate of standard 80C51 devices
• Manufacturer: NXP Semiconductors

NXP Semiconductors
P89LPC915_916_917_5
Product data sheet
Fig 20. Comparator input and output connections
(P0.5) CMPREF
8.22.1 Internal reference voltage
8.22.2 Comparator interrupt
8.22.3 Comparators and power reduction modes
(P0.4) CIN1A
(P0.3) CIN1B
(P0.2) CIN2A
(P0.1) CIN2B
8.22 Analog comparators
V
ref(bg)
Two analog comparators are provided on the P89LPC915/916/917. Input and output
options allow use of the comparators in a number of different configurations. Comparator
operation is such that the output is a logical one when the positive input is greater than the
negative input (selectable from a pin or an internal reference voltage). Otherwise the
output is a zero. Each comparator may be configured to cause an interrupt when the
output value changes. Comparator 1 may be output to a port pin.
The overall connections to both comparators are shown in
function to V
When each comparator is first enabled, the comparator output and interrupt flag are not
guaranteed to be stable for 10 microseconds. The corresponding comparator interrupt
should not be enabled during that time, and the comparator interrupt flag must be cleared
before the interrupt is enabled in order to prevent an immediate interrupt service.
An internal reference voltage generator may supply a default reference when a single
comparator input pin is used. The value of the internal reference voltage, referred to as
V
Each comparator has an interrupt flag contained in its configuration register. This flag is
set whenever the comparator output changes state. The flag may be polled by software or
may be used to generate an interrupt. The two comparators use one common interrupt
vector. If both comparators enable interrupts, after entering the interrupt service routine,
the user needs to read the flags to determine which comparator caused the interrupt.
Either or both comparators may remain enabled when Power-down or Idle mode is
activated, but both comparators are disabled automatically in Total Power-down mode.
ref(bg)
, is 1.23 V
DD
CP1
CN1
CP2
CN2
= 2.4 V.
comparator 1
comparator 2
10 %.
Rev. 05 — 15 December 2009
8-bit microcontrollers with accelerated two-clock 80C51 core
CO1
CO2
change detect
change detect
OE1
OE2
CMF1
CMF2
P89LPC915/916/917
CMP1 (P0.6)
CMP2 (P0.0)
Figure
002aaa904
EC
20. The comparators
© NXP B.V. 2009. All rights reserved.
interrupt
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