P89LPC915_916_917 NXP Semiconductors, P89LPC915_916_917 Datasheet
P89LPC915_916_917
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P89LPC915_916_917 Summary of contents
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P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core flash with 8-bit A/D converter Rev. 05 — 15 December 2009 1. General description The P89LPC915/916/917 are single-chip microcontrollers, available in low-cost packages, based on a high performance ...
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... Product comparison overview Table 1 device features, please see Table 1. Type number P89LPC915 P89LPC916 P89LPC917 P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core highlights the differences between these three devices. For a complete list of Section 2 Product comparison overview Comparator 2 SPI ...
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... P89LPC915FDH P89LPC915FN P89LPC916FDH P89LPC917FDH P89LPC915HDH [1] Please contact your local NXP sales office for availability of extended temperature ( +125 C) versions of the P89LPC916 and P89LPC917 devices. P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core Ordering information Package Name Description TSSOP14 plastic thin shrink small outline package ...
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... AND OSCILLATOR PROGRAMMABLE OSCILLATOR DIVIDER external clock input ON-CHIP RC OSCILLATOR Fig 1. P89LPC915 block diagram P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core HIGH PERFORMANCE ACCELERATED 2-CLOCK 80C51 CPU internal bus PORT 1 PORT 0 CPU clock Rev. 05 — 15 December 2009 ...
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... WATCHDOG TIMER AND OSCILLATOR PROGRAMMABLE OSCILLATOR DIVIDER external clock input ON-CHIP RC OSCILLATOR Fig 2. P89LPC916 block diagram P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core HIGH PERFORMANCE ACCELERATED 2-CLOCK 80C51 CPU internal bus PORT 2 PORT 1 PORT 0 CPU clock Rev. 05 — 15 December 2009 ...
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... AND OSCILLATOR PROGRAMMABLE OSCILLATOR DIVIDER external clock input ON-CHIP RC OSCILLATOR clkout Fig 3. P89LPC917 block diagram P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core HIGH PERFORMANCE ACCELERATED 2-CLOCK 80C51 CPU internal bus PORT 2 PORT 1 PORT 0 CPU clock Rev. 05 — 15 December 2009 ...
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... Fig 4. P89LPC915 functional diagram AD10 KBI1 AD11 KBI2 AD12 KBI3 AD13 DAC1 KBI4 CLKIN KBI5 Fig 5. P89LPC916 functional diagram P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core V DD CMP2 CIN2B CIN2A PORT 0 CIN1B P89LPC915 CIN1A CMPREF V DD CIN2B ...
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... AD10 KBI1 AD11 KBI2 AD12 KBI3 AD13 DAC1 KBI4 CLKIN KBI5 CLKOUT KBI7 Fig 6. P89LPC917 functional diagram P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core V DD CMP2 CIN2B CIN2A CIN1B PORT 0 P89LPC917 CIN1A CMPREF T1 Rev. 05 — 15 December 2009 ...
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... NXP Semiconductors 7. Pinning information 7.1 Pinning Fig 7. Fig 8. Fig 9. P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core P0.1/CIN2B/KBI1/AD10 1 2 P0.0/CMP2/KBI0 P1.5/RST 3 P89LPC915 P1.4/INT1 P1.3/INT0/SDA 6 P1.2/T0/SCL 7 P89LPC915 TSSOP14 pin configuration 1 P0.1/CIN2B/KBI1/AD10 P0.0/CMP2/KBI0 2 P1.5/RST 3 P89LPC915 P1.4/INT1 5 6 P1.3/INT0/SDA P1 ...
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... NXP Semiconductors Fig 10. P89LPC917 TSSOP16 pin configuration P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core 1 P0.1/CIN2B/KBI1/AD10 P0.0/CMP2/KBI0 2 P1.5/RST P89LPC917 5 P2.2 P1.4/INT1 6 P1.3/INT0/SDA 7 8 P1.2/T0/SCL Rev. 05 — 15 December 2009 P89LPC915/916/917 16 P0.2/CIN2A/KBI2/AD11 15 P0.3/CIN1B/KBI3/AD12 14 P0.4/CIN1A/KBI4/AD13/DAC1 13 P0.5/CMPREF/KBI5/CLKIN P0.7/T1/KBI7/CLKOUT 10 P1 ...
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... P0.4/CIN1A/KBI4/AD13/ 12 DAC1 P0.5/CMPREF/KBI5/CLKIN 11 P1.0 to P1.5 P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core Type Description I/O Port 0: Port 6-bit I/O port with a user-configurable output type. During reset Port 0 latches are configured in the input only mode with the internal pull-up disabled. The operation of Port 0 pins as inputs and outputs depends upon the port confi ...
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... [1] Input/output for P1.0 to P1.4. Input for P1.5. Table 5. P89LPC916 pin description Symbol Pin P0.0 to P0.5 P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core …continued Type Description I/O P1.0 — Port 1 bit 0. O TXD — Transmitter output for serial port. I/O P1.1 — Port 1 bit 1. I RXD — ...
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... P1.0 to P1.5 P1.0/TXD 10 P1.1/RXD 9 P1.2/T0/SCL 8 P1.3/INT0/SDA 7 P1.5/RST 3 P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core …continued Type Description I/O P0.1 — Port 0 bit 1. I CIN2B — Comparator 2 positive input B. I KBI1 — Keyboard input 1. I AD10 — ADC1 channel 0 analog input. ...
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... [1] Input/output for P1.0 to P1.3. Input for P1.5. P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core …continued Type Description I RST — External Reset input during power- selected via UCFG1. When functioning as a reset input, a LOW on this pin resets the microcontroller, causing I/O ports and peripherals to take on their default states, and the processor begins execution at address 0 ...
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... P0.3/CIN1B/KBI3/AD12 15 P0.4/CIN1A/KBI4/AD13/ 14 DAC1 P0.5/CMPREF/KBI5 13 P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core Type Description I/O Port 0: Port 7-bit I/O port with a user-configurable output type. During reset Port 0 latches are configured in the input only mode with the internal pull-up disabled. The operation of Port 0 pins as inputs and outputs depends upon the port confi ...
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... P1.0/TXD 10 P1.1/RXD 9 P1.2/T0/SCL 8 P1.3/INT0/SDA 7 P1.4/INT1 6 P1.5/RST 3 P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core …continued Type Description I/O P0.7 — Port 0 bit 7. I/O T1 — Timer/counter 1 external count input or overflow output. I KBI7 — Keyboard input 7. O CLKOUT — Clock output. ...
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... [1] Input/output for P1.0 to P1.4. Input for P1.5. P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core …continued Type Description Port 2: Port single bit I/O port with a user-configurable output type. During reset Port 2 latches are configured in the input only mode with the internal pull-up disabled. The operation of this Port 2 pin as an input and output depends upon the port confi ...
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... P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core Rev. 05 — ...
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Table 7. P89LPC915 special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address ACC* Accumulator E0H ADCON1 ADC control register 1 97H ADINS ADC input select A3H ADMODA ADC mode register A C0H ADMODB ...
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Table 7. P89LPC915 special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. FMCON Program flash control (Read) E4H Program flash control (Write) E4H FMDATA Program flash data E5H 2 I2ADR I C slave address register ...
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Table 7. P89LPC915 special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address P0* Port 0 80H Bit address P1* Port 1 90H Bit address P0M1 Port 0 output mode 1 84H P0M2 Port ...
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Table 7. P89LPC915 special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address TCON* Timer 0 and 1 control 88H TH0 Timer 0 high 8CH TH1 Timer 1 high 8DH TL0 Timer 0 low ...
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Table 8. P89LPC916 special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address ACC* Accumulator E0H ADCON1 ADC control register 1 97H ADINS ADC input select A3H ADMODA ADC mode register A C0H ADMODB ...
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Table 8. P89LPC916 special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. FMCON Program flash control (Read) E4H Program flash control (Write) E4H FMDATA Program flash data E5H 2 I2ADR I C slave address register ...
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Table 8. P89LPC916 special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address P0* Port 0 80H Bit address P1* Port 1 90H Bit address P2* Port 2 A0H P0M1 Port 0 output mode ...
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Table 8. P89LPC916 special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. SSTAT Serial port extended status BAH register SP Stack pointer 81H SPCTL SPI control register E2H SPSTAT SPI status register E1H SPDAT SPI ...
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Table 9. P89LPC917 special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address ACC* Accumulator E0H ADCON1 ADC control register 1 97H ADINS ADC input select A3H ADMODA ADC mode register A C0H ADMODB ...
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Table 9. P89LPC917 special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. FMCON Program flash control (Read) E4H Program flash control (Write) E4H FMDATA Program flash data E5H 2 I2ADR I C slave address register ...
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Table 9. P89LPC917 special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address P0* Port 0 80H Bit address P1* Port 1 90H Bit address P0M1 Port 0 output mode 1 84H (P0M1.7) P0M2 ...
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Table 9. P89LPC917 special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address TCON* Timer 0 and 1 control 88H TH0 Timer 0 high 8CH TH1 Timer 1 high 8DH TL0 Timer 0 low ...
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... MHz or slower. 8.5 Watchdog oscillator option The watchdog has a separate oscillator which has a frequency of 400 kHz. This oscillator can be used to save power when a high clock frequency is not needed. P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core Figure 11) and can also be optionally divided to a slower frequency (see register” ...
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... This can also allow bypassing the oscillator start-up time in cases where Power-down mode would otherwise be used. The value of DIVM may be changed by the program at any time without interrupting code execution. P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core has reached its specifi ...
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... TX, serial port RX, combined serial port RX/TX, brownout detect, watchdog/RTC, I The P89LPC916 supports 14 interrupt sources: external interrupts 0 and 1, timers 0 and 1, serial port TX, serial port RX, combined serial port RX/TX, brownout detect, watchdog/RTC, I P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core On-chip data memory usages Data RAM ...
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... If an external interrupt is enabled when the P89LPC915/916/917 is put into Power-down or Idle mode, the interrupt will cause the processor to wake-up and resume operation. Refer to P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core Section 8.15 “Power reduction modes” ...
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... NXP Semiconductors RTCF ERTC (RTCCON.1) WDOVF TI_0 and RI_0/RI_0 TI_1 and RI_1/RI_1 ENADCI0 Fig 12. Interrupt sources, interrupt enables, and power-down wake-up sources P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core IE0 EX0 IE1 EX1 BOF EBO KBIF EKBI ...
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... LOW driven strongly and able to sink a fairly large current. These features are somewhat similar to an open-drain output except that there are three pull-up transistors in the quasi-bidirectional output that serve different purposes. P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core Table 11 ...
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... Every output on the P89LPC915/916/917 has been designed to sink typical LED drive current. However, there is a maximum total output current for all ports which must not be exceeded. Please refer to P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core , causing extra power consumption. Therefore, applying ...
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... V entered. SFR contents are not guaranteed after highly recommended to wake-up the processor via reset in this case. V raised to within the operating range before the Power-down mode is exited. P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core (see Table 15 “Static bo ...
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... Timer 0 and Timer 1. Both can be configured to operate either as timers or event counters. An option to automatically toggle the T0 and/or T1 pins upon timer overflow has been added. P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core Rev. 05 — ...
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... The RTC is a 23-bit down-counter comprised of a 7-bit prescaler and a 16-bit loadable down-counter. When it reaches all ‘0’s, the counter will be reloaded again and the RTCF flag will be set. P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core Rev. 05 — ...
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... Mode 2 in all respects except baud rate. The baud rate in Mode 3 is variable and is determined by the Timer 1 overflow rate or the Baud Rate Generator (described in Section 8.19.5 “Baud rate generator and P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core selection” ...
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... Transmit interrupts with double buffering enabled (Modes 1, 2 and 3) Unlike the conventional UART, in double buffering mode, the TI interrupt is generated when the double buffer is ready to receive new data. P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core timer 1 overflow ...
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... Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer • The I A typical I provides a byte-oriented I Fig 14. I P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core bit (bit 8) in double buffering (Modes 1, 2 and 3) 2 C-bus may be used for test and diagnostic purposes. 2 C-bus confi ...
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... NXP Semiconductors P1.3/SDA P1.2/SCL Fig 15. I P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core P1.3 INPUT FILTER OUTPUT STAGE INPUT FILTER OUTPUT STAGE timer 1 overflow P1.2 I2CON I2SCLH I2SCLL status bus I2STAT 2 C-bus serial interface block diagram Rev. 05 — 15 December 2009 ...
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... SS is the optional slave select pin typical configuration, an SPI master asserts one of its port pins to select one SPI device as the current slave. An SPI slave device uses its SS pin to determine whether it is selected. Typical connections are shown in P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core 8-BIT SHIFT REGISTER ...
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... NXP Semiconductors 8.21.1 Typical SPI configurations Fig 17. SPI single master single slave configuration Fig 18. SPI dual device configuration, where either can be a master or a slave P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core master MISO 8-BIT SHIFT ...
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... NXP Semiconductors Fig 19. SPI single master multiple slaves configuration P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core master MISO 8-BIT SHIFT MOSI REGISTER SPICLK SPI CLOCK port GENERATOR port Rev. 05 — 15 December 2009 P89LPC915/916/917 slave MISO 8-BIT SHIFT ...
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... Comparators and power reduction modes Either or both comparators may remain enabled when Power-down or Idle mode is activated, but both comparators are disabled automatically in Total Power-down mode. P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core = 2.4 V. ...
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... In order to set the flag and cause an interrupt, the pattern on Port 0 must be held longer than six CCLKs. P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core Rev. 05 — ...
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... Data Pointers. Bit 2 of AUXR1 is permanently wired as a logic 0 so that the DPS bit may be toggled (thereby switching Data Pointers) simply by incrementing the AUXR1 register, without the possibility of inadvertently altering other bits in the register. P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core Figure 21 shows the watchdog timer in Watchdog mode ...
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... This device does not provide for direct verification of code memory contents. Instead, this device provides a 32-bit CRC result on either a sector or the entire user code space. P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core Rev. 05 — ...
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... These features are configured through the use of the flash byte UCFG1. Please see the P89LPC915/916/917 User’s Manual for additional details. P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core shows the factory default Boot Vector setting for this device ...
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... Boundary limits interrupt. I DAC output to a port pin with high output impedance. I Clock divider. I Power-down mode. P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core Figure 22. The A/D consists of a 4-input multiplexer which feeds a Rev. 05 — 15 December 2009 P89LPC915/916/917 © NXP B.V. 2009. All rights reserved. ...
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... An interrupt, if enabled, will be generated after all selected channels have been converted. If only a single channel is selected this is equivalent to single channel, single conversion mode. P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core ...
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... An interrupt will be generated, if enabled, if the result is outside the boundary limits. The boundary limit may be disabled by clearing the boundary limit interrupt enable. P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core Rev. 05 — ...
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... Idle mode when the conversion is completed if the A/D interrupt is enabled. In Power-down mode or Total Power-down mode, the A/D does not function. If the A/D is enabled, it will consume power. Power can be reduced by disabling the A/D. P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core Rev. 05 — ...
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... Nonetheless suggested that conventional precautions be taken to avoid applying greater than the rated maximum. b) Parameters are valid over ambient temperature range unless otherwise specified. All voltages are with respect to V otherwise noted. P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core ...
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... V crystal voltage xtal V voltage on any pin (except n XTAL1, XTAL2 input capacitance iss I logical 0 input current IL P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core Table 3 on page 3), unless otherwise specified. Conditions [ 3 MHz DD osc [ 3 MHz ...
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... Measured with port in high-impedance mode. [9] Port pins source a transition current when used in quasi-bidirectional mode and externally driven from logic 1 to logic 0. This current is highest when V is approximately P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core …continued Table 3 on page Conditions ...
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... SPI interface f SPI operating frequency SPI slave master T SPI cycle time SPICYC slave master P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core Table 3 on page 3), unless otherwise specified. Conditions Variable clock Min industrial 7.189 extended 7 ...
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... MOSI, MISO, SS) [1] Parameters are valid over ambient temperature range unless otherwise specified. [2] Parts are tested to 2 MHz, but are guaranteed to operate down to 0 Hz. P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core …continued Table 3 on page 3), unless otherwise specifi ...
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... SPI cycle time SPICYC slave master t SPI enable lead time SPILEAD slave t SPI enable lag time SPILAG P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core Table 3 on page 3), unless otherwise specified. Conditions Variable clock Min 7.189 extended 7 ...
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... MOSI, MISO, SS) [1] Parameters are valid over ambient temperature range unless otherwise specified. [2] Parts are tested to 2 MHz, but are guaranteed to operate down to 0 Hz. P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core …continued Table 3 on page 3), unless otherwise specifi ...
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... Fig 23. SPI master timing (CPHA = 0) SS SPICLK (CPOL = 0) (output) SPICLK (CPOL = 1) (output) MISO (input) t SPIF MOSI (output) Fig 24. SPI master timing (CPHA = 1) P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core T SPICYC t t SPIF t SPICLKL t SPICLKH t t SPIF SPIR ...
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... SPICLK (CPOL = 0) (input) t SPIF SPICLK (CPOL = 1) (input) t SPIOH t SPIDV t SPIA MISO not defined (output) MOSI (input) Fig 26. SPI slave timing (CPHA = 1) P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core T SPICYC t t SPIF SPIR t SPICLKL t SPICLKH t SPIR t SPICLKL t SPICLKH t ...
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... +125 C (see amb Symbol Parameter t V active to RST active delay time RST HIGH time RH t RST LOW time RL Fig 29. ISP entry timing P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core T XLXL t XHQX XHDX valid valid valid ...
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... CTC crosstalk between port inputs ct(port) SR input slew rate in T ADC clock cycle cy(ADC) t conversion time ADC P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core Table 3 on page 3), unless otherwise specified. Conditions Min - 0 [ < ...
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... Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION IEC SOT27-1 050G04 Fig 30. Package outline SOT27-1 (DIP14) P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core scale (1) ( ...
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... Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT402-1 Fig 31. Package outline SOT402-1 (TSSOP14) P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core ...
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... Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT403-1 Fig 32. Package outline SOT403-1 (TSSOP16) P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core ...
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... EMI PLL PWM RAM RC RTC SAR SFR SPI UART P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core Acronym list Description Analog to Digital Converter Central Processing Unit Capture/Compare Unit Digital to Analog Converter Erasable Programmable Read-Only Memory Electrically Erasable Programmable Read-Only Memory ...
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... Legal texts have been adapted to the new company name where appropriate. • Added ADC electrical characteristics, • Added P89LPC915FN. P89LPC915_916_917-04 20041217 P89LPC915_916_917-03 20040701 P89LPC915_916_917-02 20040512 P89LPC915_916_917-01 20040408 P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core Data sheet status ...
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... NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental 18. Contact information For more information, please visit: For sales office addresses, please send an email to: P89LPC915_916_917_5 Product data sheet 8-bit microcontrollers with accelerated two-clock 80C51 core [3] Definition This document contains data from the objective specifi ...
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... Brownout detection . . . . . . . . . . . . . . . . . . . . . 38 8.14.2 Power-on detection . . . . . . . . . . . . . . . . . . . . . 38 8.15 Power reduction modes . . . . . . . . . . . . . . . . . 38 8.15.1 Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 8.15.2 Power-down mode . . . . . . . . . . . . . . . . . . . . . 38 8.15.3 Total Power-down mode . . . . . . . . . . . . . . . . . 39 8.16 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 8.17 Timers/counters 0 and P89LPC915_916_917_5 Product data sheet P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core 8.17.1 Mode 8.17.2 Mode 8.17.3 Mode 8.17.4 Mode 8.17.5 Mode 8.17.6 Timer overflow toggle output . . . . . . . . . . . . . 40 8 ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 15 December 2009 Document identifier: P89LPC915_916_917_5 ...