P89LPC915_916_917 NXP Semiconductors, P89LPC915_916_917 Datasheet - Page 14

• Manufacturer Part Number: P89LPC915_916_917
• Description: The P89LPC915/916/917 are single-chip microcontrollers, available in low-cost packages,based on a high performance processor architecture that executes instructions in two tofour clocks, six times the rate of standard 80C51 devices
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 5.
[1]
P89LPC915_916_917_5
Product data sheet
Symbol
P2.2 to P2.5
P2.2/MOSI
P2.3/MISO
P2.4/SS
P2.5/SPICLK
V
V
SS
DD
Input/output for P1.0 to P1.3. Input for P1.5.
P89LPC916 pin description
Pin
6
5
2
11
4
12
…continued
Type Description
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
Rev. 05 — 15 December 2009
RST — External Reset input during power-on or if selected via UCFG1.
When functioning as a reset input, a LOW on this pin resets the
microcontroller, causing I/O ports and peripherals to take on their
default states, and the processor begins execution at address 0. Also
used during a power-on sequence to force ISP mode. When using an
oscillator frequency above 12 MHz, the reset input function of P1.5
must be enabled. An external circuit is required to hold the device
in reset at power-up until V
system power is removed V
specified operating voltage. When using an oscillator frequency
above 12 MHz, in some applications, an external brownout detect
circuit may be required to hold the device in reset when V
below the minimum specified operating voltage.
Port 2: Port 2 is a 4-bit I/O port with a user-configurable output type.
During reset Port 2 latches are configured in the input only mode with
the internal pull-up disabled. The operation of Port 2 pins as inputs and
outputs depends upon the port configuration selected. Each port pin is
configured independently. Refer to
and
All pins have Schmitt triggered inputs.
Port 2 also provides various special functions as described below:
P2.2 — Port 2 bit 2.
MOSI — SPI master out slave in. When configured as master, this pin is
output; when configured as slave, this pin is input.
P2.3 — Port 2 bit 3.
MISO — When configured as master, this pin is input, when configured
as slave, this pin is output.
P2.4 — Port 2 bit 4.
SS — SPI Slave select.
P2.5 — Port 2 bit 5.
SPICLK — SPI clock. When configured as master, this pin is output;
when configured as slave, this pin is input.
Ground: 0 V reference.
Power supply: This is the power supply voltage for normal operation as
well as Idle and Power-down modes.
8-bit microcontrollers with accelerated two-clock 80C51 core
Table 15 “Static characteristics”
P89LPC915/916/917
DD
DD
has reached its specified level. When
will fall below the minimum
Section 8.13.1 “Port configurations”
for details.
© NXP B.V. 2009. All rights reserved.
DD
falls
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