P89LPC915_916_917 NXP Semiconductors, P89LPC915_916_917 Datasheet - Page 37

• Manufacturer Part Number: P89LPC915_916_917
• Description: The P89LPC915/916/917 are single-chip microcontrollers, available in low-cost packages,based on a high performance processor architecture that executes instructions in two tofour clocks, six times the rate of standard 80C51 devices
• Manufacturer: NXP Semiconductors

NXP Semiconductors
P89LPC915_916_917_5
Product data sheet
8.13.1.2 Open-drain output configuration
8.13.1.3 Input-only configuration
8.13.1.4 Push-pull output configuration
8.13.2 Port 0 analog functions
8.13.3 Additional port features
The P89LPC915/916/917 is a 3 V device, but the pins are 5 V tolerant. In
quasi-bidirectional mode, if a user applies 5 V on the pin, there will be a current flowing
from the pin to V
quasi-bidirectional mode is discouraged.
A quasi-bidirectional port pin has a Schmitt triggered input that also has a glitch
suppression circuit.
The open-drain output configuration turns off all pull-ups and only drives the pull-down
transistor of the port driver when the port latch contains a logic 0. To be used as a logic
output, a port configured in this manner must have an external pull-up, typically a resistor
tied to V
An open-drain port pin has a Schmitt triggered input that also has a glitch suppression
circuit.
The input-only port configuration has no output drivers. It is a Schmitt triggered input that
also has a glitch suppression circuit.
The push-pull output configuration has the same pull-down structure as both the
open-drain and the quasi-bidirectional output modes, but provides a continuous strong
pull-up when the port latch contains a logic 1. The push-pull mode may be used when
more source current is needed from a port output. A push-pull port pin has a
Schmitt triggered input that also has a glitch suppression circuit.
The P89LPC915/916/917 incorporates two Analog Comparators. In order to give the best
analog function performance and to minimize power consumption, pins that are being
used for analog functions must have the digital outputs and digital inputs disabled.
Digital outputs are disabled by putting the port output into the Input-Only
(high-impedance) mode.
Digital inputs on Port 0 may be disabled through the use of the PT0AD register. On any
reset, PT0AD bits default to ‘0’s to enable digital functions.
After power-up, all pins are in Input-Only mode. After power-up, all I/O pins except P1.5,
may be configured by software.
Every output on the P89LPC915/916/917 has been designed to sink typical LED drive
current. However, there is a maximum total output current for all ports which must not be
exceeded. Please refer to
•
•
Pin P1.5 is input only.
Pins P1.2 and P1.3 are configurable for either input-only or open-drain.
DD
.
DD
, causing extra power consumption. Therefore, applying 5 V in
Rev. 05 — 15 December 2009
8-bit microcontrollers with accelerated two-clock 80C51 core
Table 15 “Static characteristics”
P89LPC915/916/917
for detailed specifications.
© NXP B.V. 2009. All rights reserved.
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