P89LPC915_916_917 NXP Semiconductors, P89LPC915_916_917 Datasheet - Page 16

• Manufacturer Part Number: P89LPC915_916_917
• Description: The P89LPC915/916/917 are single-chip microcontrollers, available in low-cost packages,based on a high performance processor architecture that executes instructions in two tofour clocks, six times the rate of standard 80C51 devices
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 6.
P89LPC915_916_917_5
Product data sheet
Symbol
P0.7/T1/KBI7/CLKOUT
P1.0 to P1.5
P1.0/TXD
P1.1/RXD
P1.2/T0/SCL
P1.3/INT0/SDA
P1.4/INT1
P1.5/RST
P89LPC917 pin description
Pin
11
10
9
8
7
6
3
…continued
Type Description
I/O
I/O
I
O
I/O, I
[1]
I/O
O
I/O
I
I/O
I/O
I/O
I/O
I
I/O
I
I
I
I
Rev. 05 — 15 December 2009
P0.7 — Port 0 bit 7.
T1 — Timer/counter 1 external count input or overflow output.
KBI7 — Keyboard input 7.
CLKOUT — Clock output.
Port 1: Port 1 is a 6-bit I/O port with a user-configurable output type,
except for three pins as noted below. During reset Port 1 latches are
configured in the input only mode with the internal pull-up disabled. The
operation of the configurable Port 1 pins as inputs and outputs depends
upon the port configuration selected. Each of the configurable port pins
are programmed independently. Refer to
configurations”
P1.3 are open drain when used as outputs. P1.5 is input only.
All pins have Schmitt triggered inputs.
Port 1 also provides various special functions as described below:
P1.0 — Port 1 bit 0.
TXD — Transmitter output for serial port.
P1.1 — Port 1 bit 1.
RXD — Receiver input for serial port.
P1.2 — Port 1 bit 2 (open-drain when used as output).
T0 — Timer/counter 0 external count input or overflow output (open-drain
when used as output).
SCL — I
P1.3 — Port 1 bit 3 (open-drain when used as output).
INT0 — External interrupt 0 input.
SDA — I
P1.4 — Port 1 bit 4.
INT1 — External interrupt 1 input.
P1.5 — Port 1 bit 5 (input only).
RST — External Reset input during power-on or if selected via UCFG1.
When functioning as a reset input, a LOW on this pin resets the
microcontroller, causing I/O ports and peripherals to take on their default
states, and the processor begins execution at address 0. Also used
during a power-on sequence to force ISP mode. When using an
oscillator frequency above 12 MHz, the reset input function of P1.5
must be enabled. An external circuit is required to hold the device in
reset at power-up until V
system power is removed V
operating voltage. When using an oscillator frequency above
12 MHz, in some applications, an external brownout detect circuit
may be required to hold the device in reset when V
minimum specified operating voltage.
8-bit microcontrollers with accelerated two-clock 80C51 core
2
2
C serial clock input/output.
C serial data input/output.
and
Table 15 “Static characteristics”
DD
P89LPC915/916/917
has reached its specified level. When
DD
will fall below the minimum specified
Section 8.13.1 “Port
for details. P1.2 to
© NXP B.V. 2009. All rights reserved.
DD
falls below the
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