P89LPC915_916_917 NXP Semiconductors, P89LPC915_916_917 Datasheet - Page 41

no-image

P89LPC915_916_917

Manufacturer Part Number
P89LPC915_916_917
Description
The P89LPC915/916/917 are single-chip microcontrollers, available in low-cost packages,based on a high performance processor architecture that executes instructions in two tofour clocks, six times the rate of standard 80C51 devices
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
P89LPC915_916_917_5
Product data sheet
8.19.1 Mode 0
8.19.2 Mode 1
8.19.3 Mode 2
8.19.4 Mode 3
8.19 UART
The clock source for this counter can be either the CPU clock (CCLK) or the external clock
input, provided that the external clock input is not being used as the CPU clock. If the
external clock input is used as the CPU clock, then the RTC will use CCLK as its clock
source. Only power-on reset will reset the RTC and its associated SFRs to the default
state.
The P89LPC915/916/917 has an enhanced UART that is compatible with the conventional
80C51 UART except that Timer 2 overflow cannot be used as a baud rate source. The
P89LPC915/916/917 does include an independent Baud Rate Generator. The baud rate
can be selected from the oscillator (divided by a constant), Timer 1 overflow, or the
independent Baud Rate Generator. In addition to the baud rate generation, enhancements
over the standard 80C51 UART include Framing Error detection, automatic address
recognition, selectable double buffering and several interrupt options. The UART can be
operated in 4 modes: shift register, 8-bit UART, 9-bit UART, and CPU clock/32 or CPU
clock/16.
Serial data enters and exits through RXD. TXD outputs the shift clock. 8 bits are
transmitted or received, LSB first. The baud rate is fixed at
frequency.
10 bits are transmitted (through TXD) or received (through RXD): a start bit (logic 0),
8 data bits (LSB first), and a stop bit (logic 1). When data is received, the stop bit is stored
in RB8_n in Special Function Register SnCON. The baud rate is variable and is
determined by the Timer 1 overflow rate or the Baud Rate Generator (described in
8.19.5 “Baud rate generator and
11 bits are transmitted (through TXD) or received (through RXD): start bit (logic 0), 8 data
bits (LSB first), a programmable 9
transmitted, the 9
example, the parity bit (P, in the PSW) could be moved into TB8. When data is received,
the 9
saved. The baud rate is programmable to either
determined by the SMOD1 bit in PCON. The SMOD1 bit controls the Timer 1 output rate
available to the UART.
11 bits are transmitted (through TXD) or received (through RXD): a start bit (logic 0), 8
data bits (LSB first), a programmable 9
the same as Mode 2 in all respects except baud rate. The baud rate in Mode 3 is variable
and is determined by the Timer 1 overflow rate or the Baud Rate Generator (described in
Section 8.19.5 “Baud rate generator and
th
data bit goes into RB8 in Special Function Register SCON, while the stop bit is not
th
data bit (TB8 in SCON) can be assigned the value of ‘0’ or ‘1’. Or, for
Rev. 05 — 15 December 2009
8-bit microcontrollers with accelerated two-clock 80C51 core
selection”).
th
data bit, and a stop bit (logic 1). When data is
th
data bit, and a stop bit (logic 1). In fact, Mode 3 is
selection”).
P89LPC915/916/917
1
16
or
1
32
of the CPU clock frequency, as
1
16
of the CPU clock
© NXP B.V. 2009. All rights reserved.
Section
41 of 75

Related parts for P89LPC915_916_917