P89LPC915_916_917 NXP Semiconductors, P89LPC915_916_917 Datasheet - Page 15
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P89LPC915_916_917
Manufacturer Part Number
P89LPC915_916_917
Description
The P89LPC915/916/917 are single-chip microcontrollers, available in low-cost packages,based on a high performance processor architecture that executes instructions in two tofour clocks, six times the rate of standard 80C51 devices
Manufacturer
NXP Semiconductors
Datasheet
1.P89LPC915_916_917.pdf
(75 pages)
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NXP Semiconductors
Table 6.
P89LPC915_916_917_5
Product data sheet
Symbol
P0.0 to P0.5, P0.7
P0.0/CMP2/KBI0
P0.1/CIN2B/KBI1/AD10
P0.2/CIN2A/KBI2/AD11
P0.3/CIN1B/KBI3/AD12
P0.4/CIN1A/KBI4/AD13/
DAC1
P0.5/CMPREF/KBI5
P89LPC917 pin description
Pin
2
1
16
15
14
13
Type Description
I/O
I/O
O
I
I/O
I
I
I
I/O
I
I
I
I/O
I
I
I
I/O
I
I
I
O
I/O
I
I
I
Rev. 05 — 15 December 2009
Port 0: Port 0 is a 7-bit I/O port with a user-configurable output type.
During reset Port 0 latches are configured in the input only mode with the
internal pull-up disabled. The operation of Port 0 pins as inputs and
outputs depends upon the port configuration selected. Each port pin is
configured independently. Refer to
and
The Keypad Interrupt feature operates with Port 0 pins.
All pins have Schmitt triggered inputs.
Port 0 also provides various special functions as described below:
P0.0 — Port 0 bit 0.
CMP2 — Comparator 2 output.
KBI0 — Keyboard input 0.
P0.1 — Port 0 bit 1.
CIN2B — Comparator 2 positive input B.
KBI1 — Keyboard input 1.
AD10 — ADC1 channel 0 analog input.
P0.2 — Port 0 bit 2.
CIN2A — Comparator 2 positive input A.
KBI2 — Keyboard input 2.
AD11 — ADC1 channel 1 analog input.
P0.3 — Port 0 bit 3.
CIN1B — Comparator 1 positive input B.
KBI3 — Keyboard input 3.
AD12 — ADC1 channel 2 analog input.
P0.4 — Port 0 bit 4.
CIN1A — Comparator 1 positive input A.
KBI4 — Keyboard input 4.
AD13 — ADC1 channel 3 analog input.
DAC1 — DAC1 analog output.
P0.5 — Port 0 bit 5.
CMPREF — Comparator reference (negative) input.
KBI5 — Keyboard input 5.
CLKIN — External clock input.
8-bit microcontrollers with accelerated two-clock 80C51 core
Table 15 “Static characteristics”
P89LPC915/916/917
Section 8.13.1 “Port configurations”
for details.
© NXP B.V. 2009. All rights reserved.
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