ADUC7060 Analog Devices, ADUC7060 Datasheet - Page 41

• Manufacturer Part Number: ADUC7060
• Description: Low-Power, Precision Analog Microcontroller, Dual ?-? ADCs, Flash/EE, ARM7TDMI
• Manufacturer: Analog Devices

Specifications of ADUC7060

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 10
• Sram (bytes): 4096Bytes
• Gpio Pins: 14
• Adc # Channels: 10
• Other: 14 Bit DAC,PWM

ADC COMPARATOR AND ACCUMULATOR
Every primary ADC result can be compared to a preset
threshold level (ADC0TH) as configured via ADCCFG[4:3]. An
MCU interrupt is generated if the absolute (sign independent)
value of the ADC result is greater than the preprogrammed
comparator threshold level. An extended function of this
comparator function allows user code to configure a threshold
counter (ADC0THV) to monitor the number of primary ADC
results that have occurred above or below the preset threshold
level. Again, an ADC interrupt is generated when the threshold
counter reaches a preset value (ADC0RCR).
Finally, a 32-bit accumulator (ADC0ACC) function can be
configured (ADCCFG[6:5]) allowing the primary ADC to add
(or subtract) multiple primary ADC sample results. User code
can read the accumulated value directly (ADC0ACC) without
any further software processing.
TEMPERATURE SENSOR
The ADuC706x provides a voltage output from an on-chip
band gap reference proportional to absolute temperature. This
voltage output can also be routed through the front-end
auxiliary ADC multiplexer (effectively, an additional ADC
channel input), facilitating an internal temperature sensor
channel that measures die temperature.
The internal temperature sensor is not designed for use as
an absolute ambient temperature calculator. It is intended
for use as an approximate indicator of the temperature of
the ADuC706x die.
The typical temperature coefficient is 0.28 mV/°C.
140
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100
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60
40
20
0
–60
–40
Figure 16. ADC Output vs. Temperature
–20
0
TEMPERATURE (°C)
20
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60
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140
Rev. C | Page 41 of 108
ADC MMR INTERFACE
The ADCs are controlled and configured through a number of
MMRs that are described in detail in the following sections.
In response to an ADC interrupt, user code should interrogate
the ADCSTA MMR to determine the source of the interrupt.
Each ADC interrupt source can be individually masked via the
ADCMSKI MMR described in Table 41.
All primary ADC result ready bits are cleared by a read of the
ADC0DAT MMR. If the primary channel ADC is not enabled,
all ADC result ready bits are cleared by a read of the ADC1DAT
MMR. To ensure that primary ADC and auxiliary ADC
conversion data are synchronous, user code should first read
the ADC1DAT MMR and then the ADC0DAT MMR. New
ADC conversion results are not written to the ADCxDAT
MMRs unless the respective ADC result ready bits are first
cleared. The only exception to this rule is the data conversion
result updates when the ARM core is powered down. In this
mode, ADCxDAT registers always contain the most recent
ADC conversion result even though the ready bits are not
cleared.
ADC Status Register
Name:
Address:
Default value:
Access:
Function:
ADCSTA
0xFFFF0500
0x0000
Read only
This read-only register holds general status
information related to the mode of operation
or current status of the ADuC706x ADCs.
ADuC7060/ADuC7061