ADUC7060 Analog Devices, ADUC7060 Datasheet - Page 30

• Manufacturer Part Number: ADUC7060
• Description: Low-Power, Precision Analog Microcontroller, Dual ?-? ADCs, Flash/EE, ARM7TDMI
• Manufacturer: Analog Devices

Specifications of ADUC7060

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 10
• Sram (bytes): 4096Bytes
• Gpio Pins: 14
• Adc # Channels: 10
• Other: 14 Bit DAC,PWM

ADuC7060/ADuC7061
Table 21. ADC Address Base = 0xFFFF0500
Address
0x0500
0x0504
0x0508
0x050C
0x0510
0x0514
0x0518
0x051C
0x0520
0x0524
0x0528
0x052C
0x0530
0x0534
0x0538
0x053C
0x0540
0x0544
0x0548
0x054C
0x0570
1
Table 22. DAC Control Address Base = 0xFFFF0600
Address
0x0600
0x0604
Table 23. UART Base Address = 0xFFFF0700
Address
0x0700
0x0700
0x0700
0x0704
0x0704
0x0708
0x070C
0x0710
0x0714
0x0718
0X072C
Updated by the kernel to part specific calibration value.
Name
ADCSTA
ADCMSKI
ADCMDE
ADC0CON
ADC1CON
ADCFLT
ADCCFG
ADC0DAT
ADC1DAT
ADC0OF
ADC1OF
ADC0GN
ADC1GN
ADC0RCR
ADC0RCV
ADC0TH
ADC0THC
ADC0THV
ADC0ACC
ADC0ATH
IEXCON
Name
DAC0CON
DAC0DAT
Name
COMTX
COMRX
COMDIV0
COMIEN0
COMDIV1
COMIID0
COMCON0
COMCON1
COMSTA0
COMSTA1
COMDIV2
1
1
1
1
Bytes
1
1
1
1
1
1
1
1
1
1
2
Bytes
2
2
1
2
2
2
1
4
4
2
2
2
2
2
2
2
2
2
4
4
1
Bytes
2
4
Access
Type
R
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R
R
R/W
R/W
Access
Type
R/W
R/W
Access
Type
W
R
R/W
R/W
R/W
R
R/W
R/W
R
R
R/W
Default Value
0x0000
0x0000
0x03
0x8000
0x0000
0x0007
0x00
0x00000000
0x00000000
0x0000, part specific, factory
programmed
0x0000, part specific, factory
programmed
0x5555
0x5555
0x0001
0x0000
0x0000
0x0001
0x0000
0x00000000
0x00000000
0x00
Default Value
0x0200
0x00000000
Default Value
N/A
0x00
0x00
0x00
0x00
0x01
0x00
0x00
0x60
0x00
0x0000
Rev. C | Page 30 of 108
Description
ADC status MMR.
ADC interrupt source enable MMR.
ADC mode register.
Primary ADC control MMR.
Auxiliary ADC control MMR.
ADC filter control MMR.
ADC configuration MMR.
Primary ADC result MMR.
Auxiliary ADC result MMR
Primary ADC offset calibration setting.
Auxiliary ADC offset MMR.
Primary ADC offset MMR.
Auxiliary ADC offset MMR. See the ADC operation mode
configuration bit (ADCLPMCFG[1:0]) in Table 42.
Primary ADC result counter/reload MMR.
Primary ADC result counter MMR.
Primary ADC 16-bit comparator threshold MMR.
Primary ADC 16-bit comparator threshold counter limit.
ADC0 8-bit threshold exceeded counter register
Primary ADC accumulator.
Primary ADC 32-bit comparator threshold MMR.
Excitation current sources control register.
Description
DAC control register.
DAC output data register.
Description
UART transmit register.
UART receive register.
UART Standard Baud Rate Generator Divisor Value 0.
UART Interrupt Enable MMR 0.
UART Standard Baud Rate Generator Divisor Value 1.
UART Interrupt Identification 0.
UART Control Register 0.
UART Control Register 1.
UART Status Register 0.
UART Status Register 1.
UART fractional divider MMR.