ADUC7060 Analog Devices, ADUC7060 Datasheet - Page 102

• Manufacturer Part Number: ADUC7060
• Description: Low-Power, Precision Analog Microcontroller, Dual ?-? ADCs, Flash/EE, ARM7TDMI
• Manufacturer: Analog Devices

Specifications of ADUC7060

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 10
• Sram (bytes): 4096Bytes
• Gpio Pins: 14
• Adc # Channels: 10
• Other: 14 Bit DAC,PWM

ADuC7060/ADuC7061
Table 110. GPxCON MMR Bit Designations
Bit
31:30
29:28
27:26
25:24
23:22
21:20
19:18
17:16
15:14
13:12
11:10
9:8
7:6
5:4
3:2
1:0
GPxDAT REGISTERS
GPxDAT are Port x configuration and data registers. They con-
figure the direction of the GPIO pins of Port x, set the output
value for the pins that are configured as output, and store the
input value of the pins that are configured as input.
Table 111. GPxDAT Registers
Name
GP0DAT
GP1DAT
GP2DAT
Table 112. GPxDAT MMR Bit Designations
Bit
31:24
23:16
15:8
7:0
Description
Reserved.
Reserved.
Reserved.
Selects the function of the P0.6/RTS and P1.6/PWM pins.
Reserved.
Selects the function of the P0.5/CTS and P1.5/PWM3 pins.
Reserved.
Selects the function of the P0.4/IRQ0/PWM1 and
P1.4/PWM2 pins.
Reserved.
Selects the function of the P0.3/MOSI/SDA and P1.3/TRIP
pins.
Reserved.
Selects the function of the P0.2/MISO and P1.2/SYNC pins.
Reserved.
Selects the function of the P0.1/SCLK/SCL, P1.1/SOUT,
and P2.1/IRQ3/PWM5 pins.
Reserved.
Selects the function of the P0.0/SS, P1.0/IRQ1/SIN/T0,
P2.0/IRQ2/PWM0/EXTCLK pins.
Description
Direction of the data.
Set to 1 by user to configure the GPIO pin as an output.
Cleared to 0 by user to configure the GPIO pin as an input.
Port x data output.
Reflect the state of Port x pins at reset (read only).
Port x data input (read only).
Address
0xFFFF0D20
0xFFFF0D30
0xFFFF0D40
Default Value
0x000000XX
0x000000XX
0x000000XX
Access
R/W
R/W
R/W
Rev. C | Page 102 of 108
GPxSET REGISTERS
GPxSET are data set Port x registers.
Table 113. GPxSET Registers
Name
GP0SET
GP1SET
GP2SET
Table 114. GPxSET MMR Bit Designations
Bit
31:24
23:16
15:0
GPxCLR REGISTERS
GPxCLR are data clear Port x registers.
Table 115. GPxCLR Registers
Name
GP0CLR
GP1CLR
GP2CLR
Table 116. GPxCLR MMR Bit Designations
Bit
31:24
23:16
15:0
GPxPAR REGISTERS
The GPxPAR registers program the parameters for Port 0, Port 1,
and Port 2. Note that the GPxDAT MMR must always be written
after changing the GPxPAR MMR. Note that it is not possible to
disable the internal pull-up resistor on P0.2.
Table 117. GPxPAR Registers
Name
GP0PAR
GP1PAR
GP2PAR
Description
Reserved.
Data Port x set bit.
Set to 1 by user to set bit on Port x; also sets the
corresponding bit in the GPxDAT MMR.
Cleared to 0 by user; does not affect the data output.
Reserved.
Description
Reserved.
Data Port x clear bit.
Reserved.
Set to 1 by user to clear the bit on Port x; also clears
the corresponding bit in the GPxDAT MMR.
Cleared to 0 by user; does not affect the data output.
Address
0xFFFF0D28
0xFFFF0D38
0xFFFF0D48
Address
0xFFFF0D24
0xFFFF0D34
0xFFFF0D44
Address
0xFFFF0D2C
0xFFFF0D3C
0xFFFF0D4C
Default Value
0x000000XX
0x000000XX
0x000000XX
Default Value
0x000000XX
0x000000XX
0x000000XX
Default Value
0x00000000
0x00000000
0x00000000
Access
W
W
W
Access
W
W
W
Access
R/W
R/W
R/W