ATxmega64A1 Atmel Corporation, ATxmega64A1 Datasheet - Page 271

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ATxmega64A1

Manufacturer Part Number
ATxmega64A1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64A1

Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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24.6.3
24.6.4
8077H–AVR–12/09
Multiplexing address byte 0 and 2
Multiplexing address byte 0, 1and 2
Figure 24-3. Multiplexed SRAM connection using ALE1
When address byte 0 (A[7:0]) and address byte 2 (A[23:16) are multiplexed, they are output
from the same port, and the ALE2 signal from the device control the address latch.
Figure 24-4. Multiplexed SRAM connection using ALE2
When address byte 0 (A[7:0]), address byte 1 (A[15:8]) and address byte 2 (A[23:16] are multi-
plexed, they are output from the same port, and the ALE1 and ALE2 signal from the device
control the external address latches.
EBI
EBI
A[23:16]/
A[19:16]
A[15:8]/
A[15:8]
D[7:0]
D[7:0]
A[7:0]
A[7:0]
ALE1
ALE2
D
G
Q
D
G
Q
D[7:0]
A[7:0]
A[15:8]
A[19:16]
D[7:0]
A[7:0]
A[15:8]
A[23:16]
SRAM
SRAM
XMEGA A
271

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