ATxmega64A1 Atmel Corporation, ATxmega64A1 Datasheet - Page 134

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ATxmega64A1

Manufacturer Part Number
ATxmega64A1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64A1

Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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13.6
8077H–AVR–12/09
Input Sense Configuration
Figure 13-8. Synchronization when reading an externally applied pin value.
Input sensing is used to detect an edge or level on the I/O pin input. The different sense configu-
rations that are available for each pin are detection of rising edge, falling edge or both edges, or
detection of low level. High level can be detected by using inverted input. Input sensing can be
used to trigger interrupt requests (IREQ) or s when there is a change on the pin.
The I/O pins support synchronous and asynchronous input sensing. Synchronous sensing
requires presence of the peripheral clock, while asynchronous sensing does not require any
clock.
Figure 13-9. Input sensing.
INVERTED I/O
Pn
PERIPHERAL CLK
SYNC FLIPFLOP
INSTRUCTIONS
r17
IN
Synchronizer
INn
D
R
Q
xxx
D
R
Q
Asynchronous sensing
Synchronous sensing
xxx
DETECT
DETECT
EDGE
EDGE
t
0x00
pd, max
t
pd, min
lds r17, PORTx+IN
XMEGA A
Interrupt
Control
0xFF
IREQ
Event
134

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