ATxmega64A1 Atmel Corporation, ATxmega64A1 Datasheet - Page 224

• Manufacturer Part Number: ATxmega64A1
• Manufacturer: Atmel Corporation

Specifications of ATxmega64A1

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 78
• Ext Interrupts: 78
• Usb Speed: No
• Usb Interface: No
• Spi: 12
• Twi (i2c): 4
• Uart: 8
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 8
• Output Compare Channels: 24
• Input Capture Channels: 24
• Pwm Channels: 24
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

19.10.3
8077H–AVR–12/09
STATUS– TWI Slave Status Register
• Bit 2 - ACKACT: Acknowledge Action
The Acknowledge Action (ACKACT) bit defines the slave's acknowledge behavior after an
address or data byte is received from the master. The Acknowledge Action is executed when a
command is written to the CMD bits. If the SMEN bit in the CTRLA register is set, the Acknowl-
edge Action is performed when the DATA register is read.
Table 19-6
Table 19-6.
• Bit 1:0 - CMD[1:0]: Command
Writing the Command (CMD) bits triggers the slave operation as defined by
CMD bits are strobe bits, and always read as zero. The operation is dependent on the slave
interrupt flags, DIF and APIF. The Acknowledge Action is only executed when the slave receives
data bytes or address byte from the master.
Table 19-7.
Writing the CMD bits will automatically clear the slave interrupt flags, the CLKHOLD flag and
release the SCL line. The ACKACT bit and CMD bits can be written at the same time, and then
the Acknowledge Action will be updated before the command is triggered.
Bit
+0x02
Read/Write
Initial Value
CMD[1:0]
00
01
10
11
lists the acknowledge actions.
ACKACT
R/W
DIF
7
0
TWI slave acknowledge action
TWI slave command
0
1
Used to complete transaction
Used in response to an Address Byte (APIF is set)
Used in response to a Data Byte (DIF is set)
DIR
X
X
0
1
0
1
0
1
APIF
R/W
6
0
Operation
No action
Reserved
Execute Acknowledge Action succeeded by waiting for any START
(S/Sr) condition.
Wait for any START (S/Sr) condition.
Execute Acknowledge Action succeeded by reception of next byte.
Execute Acknowledge Action succeeded by the DIF being set
Execute Acknowledge Action succeeded by waiting for the next byte.
No operation.
CLKHOLD
R/W
5
0
Action
Send ACK
Send NACK
RXACK
R
4
0
COLL
R/W
3
0
BUSERR
R/W
2
0
R/W
DIR
1
0
XMEGA A
Table
R/W
AP
0
0
19-7. The
STATUS
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