ATxmega32A4U Atmel Corporation, ATxmega32A4U Datasheet - Page 503

• Manufacturer Part Number: ATxmega32A4U
• Manufacturer: Atmel Corporation

Specifications of ATxmega32A4U

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 7
• Twi (i2c): 2
• Uart: 5
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 16
• Input Capture Channels: 16
• Pwm Channels: 16
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8331A–AVR–07/11
31 IEEE 1149.1 JTAG Boundary Scan Interface ..................................... 403
32 Program and Debug Interface ............................................................. 410
33 Memory Programming ......................................................................... 427
30.6
30.7
30.8
30.9
30.10
30.11
31.1
31.2
31.3
31.4
31.5
31.6
32.1
32.2
32.3
32.4
32.5
32.6
32.7
32.8
33.1
33.2
33.3
33.4
33.5
33.6
33.7
33.8
33.9
33.10
33.11
33.12
Window Mode ................................................................................................395
Input hysteresis .............................................................................................395
Propagation delay vs. Power consumption ...................................................395
Register Description ......................................................................................396
Register Summary .........................................................................................402
Interrupt vector Summary ..............................................................................402
Features ........................................................................................................403
Overview ........................................................................................................403
TAP - Test Access Port .................................................................................403
JTAG Instructions ..........................................................................................405
Boundary Scan Chain ....................................................................................407
Data Registers ...............................................................................................408
Features ........................................................................................................410
Overview ........................................................................................................410
PDI Physical ..................................................................................................411
JTAG Physical ...............................................................................................415
PDI Controller ................................................................................................418
Register Description - PDI Instruction and Addressing Registers .................422
Register Description – PDI Control and Status Registers .............................424
Register Summary .........................................................................................426
Features ........................................................................................................427
Overview ........................................................................................................427
NVM Controller ..............................................................................................428
NVM Commands ...........................................................................................428
NVM Controller Busy Status ..........................................................................428
Flash and EEPROM Page Buffers ................................................................429
Flash and EEPROM Programming Sequences .............................................430
Protection of NVM .........................................................................................431
Preventing NVM Corruption ...........................................................................431
CRC Functionality ..........................................................................................431
Self-Programming and Boot Loader Support ................................................432
External Programming ...................................................................................443
Atmel AVR XMEGA AU
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